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authorMarek Olšák <marek.olsak@amd.com>2016-07-15 00:39:38 +0200
committerMarek Olšák <marek.olsak@amd.com>2016-08-03 17:46:46 +0200
commita6bfafa083ef4f3320ca45bfc3e5697674e4b12c (patch)
treecda3dd8005a9a99bb671aa74a331b3cfefae2ebd /src/gallium/drivers/radeonsi/si_hw_context.c
parentc15a9dec298940c918403353c6830f4f71115592 (diff)
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gallium/radeon: move last_gfx_fence from radeonsi to common code
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_hw_context.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_hw_context.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index e2e7afd..91c985f 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -102,9 +102,9 @@ void si_context_gfx_flush(void *context, unsigned flags,
ctx->gfx_flush_in_progress = true;
if (!radeon_emitted(cs, ctx->b.initial_gfx_cs_size) &&
- (!fence || ctx->last_gfx_fence)) {
+ (!fence || ctx->b.last_gfx_fence)) {
if (fence)
- ws->fence_reference(fence, ctx->last_gfx_fence);
+ ws->fence_reference(fence, ctx->b.last_gfx_fence);
if (!(flags & RADEON_FLUSH_ASYNC))
ws->cs_sync_flush(cs);
ctx->gfx_flush_in_progress = false;
@@ -135,17 +135,17 @@ void si_context_gfx_flush(void *context, unsigned flags,
}
/* Flush the CS. */
- ws->cs_flush(cs, flags, &ctx->last_gfx_fence);
+ ws->cs_flush(cs, flags, &ctx->b.last_gfx_fence);
if (fence)
- ws->fence_reference(fence, ctx->last_gfx_fence);
+ ws->fence_reference(fence, ctx->b.last_gfx_fence);
/* Check VM faults if needed. */
if (ctx->screen->b.debug_flags & DBG_CHECK_VM) {
/* Use conservative timeout 800ms, after which we won't wait any
* longer and assume the GPU is hung.
*/
- ctx->b.ws->fence_wait(ctx->b.ws, ctx->last_gfx_fence, 800*1000*1000);
+ ctx->b.ws->fence_wait(ctx->b.ws, ctx->b.last_gfx_fence, 800*1000*1000);
si_check_vm_faults(&ctx->b, &ctx->last_gfx, RING_GFX);
}