radeonsi: move vertex buffer descriptors from IB to memory

This removes the intermediate storage (pm4 state) and generates descriptors
directly in a staging buffer.

It also reduces the number of flushes, because the descriptors no longer
take CS space.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

1 files changed, 0 insertions, 31 deletions

diff --git a/src/gallium/drivers/radeonsi/si_pm4.c b/src/gallium/drivers/radeonsi/si_pm4.c
index 082da85..705b226 100644
--- a/src/gallium/drivers/radeonsi/si_pm4.c
+++ b/src/gallium/drivers/radeonsi/si_pm4.c
@@ -103,37 +103,6 @@ void si_pm4_add_bo(struct si_pm4_state *state,
 	state->bo_priority[idx] = priority;
 }
 
-void si_pm4_sh_data_begin(struct si_pm4_state *state)
-{
-	si_pm4_cmd_begin(state, PKT3_NOP);
-}
-
-void si_pm4_sh_data_add(struct si_pm4_state *state, uint32_t dw)
-{
-	si_pm4_cmd_add(state, dw);
-}
-
-void si_pm4_sh_data_end(struct si_pm4_state *state, unsigned base, unsigned idx)
-{
-	unsigned offs = state->last_pm4 + 1;
-	unsigned reg = base + idx * 4;
-
-	/* Bail if no data was added */
-	if (state->ndw == offs) {
-		state->ndw--;
-		return;
-	}
-
-	si_pm4_cmd_end(state, false);
-
-	si_pm4_cmd_begin(state, PKT3_SET_SH_REG_OFFSET);
-	si_pm4_cmd_add(state, (reg - SI_SH_REG_OFFSET) >> 2);
-	state->relocs[state->nrelocs++] = state->ndw;
-	si_pm4_cmd_add(state, offs << 2);
-	si_pm4_cmd_add(state, 0);
-	si_pm4_cmd_end(state, false);
-}
-
 void si_pm4_inval_shader_cache(struct si_pm4_state *state)
 {
 	state->cp_coher_cntl |= S_0085F0_SH_ICACHE_ACTION_ENA(1);