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| author | Marek Olšák <marek.olsak@amd.com> | 2016-02-06 22:09:45 +0100 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2016-02-10 19:41:49 +0100 |
| commit | 7aedbbacae6d3ec3d06735fff2eb662964773ad2 (patch) | |
| tree | 8e641136cfb7acaaba9e00c1198e5e9d782df140 /src/gallium/drivers/radeonsi/si_shader.h | |
| parent | 796ee76e2eeabbeed9ab41b012363cabd5497b33 (diff) | |
| download | external_mesa3d-7aedbbacae6d3ec3d06735fff2eb662964773ad2.zip external_mesa3d-7aedbbacae6d3ec3d06735fff2eb662964773ad2.tar.gz external_mesa3d-7aedbbacae6d3ec3d06735fff2eb662964773ad2.tar.bz2 | |
radeonsi: put image, fmask, and sampler descriptors into one array
The texture slot is expanded to 16 dwords containing 2 descriptors.
Those can be:
- Image and fmask, or
- Image and sampler state
By carefully choosing the locations, we can put all three into one slot,
with the fmask and sampler state being mutually exclusive.
This improves shaders in 2 ways:
- 2 user SGPRs are unused, shaders can use them as temporary registers now
- each pair of descriptors is always on the same cache line
v2: cosmetic changes: add back v8i32, don't load a sampler state & fmask
at the same time
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_shader.h')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index c42c51e..dc75e03 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -77,8 +77,8 @@ struct radeon_shader_reloc; #define SI_SGPR_RW_BUFFERS 0 /* rings (& stream-out, VS only) */ #define SI_SGPR_CONST_BUFFERS 2 -#define SI_SGPR_SAMPLER_STATES 4 -#define SI_SGPR_SAMPLER_VIEWS 6 +#define SI_SGPR_SAMPLERS 4 /* images & sampler states interleaved */ +/* TODO: gap */ #define SI_SGPR_VERTEX_BUFFERS 8 /* VS only */ #define SI_SGPR_BASE_VERTEX 10 /* VS only */ #define SI_SGPR_START_INSTANCE 11 /* VS only */ @@ -101,8 +101,8 @@ struct radeon_shader_reloc; /* LLVM function parameter indices */ #define SI_PARAM_RW_BUFFERS 0 #define SI_PARAM_CONST_BUFFERS 1 -#define SI_PARAM_SAMPLER_STATES 2 -#define SI_PARAM_SAMPLER_VIEWS 3 +#define SI_PARAM_SAMPLERS 2 +#define SI_PARAM_UNUSED 3 /* TODO: use */ /* VS only parameters */ #define SI_PARAM_VERTEX_BUFFERS 4 |