radeonsi: import all TGSI->LLVM code from gallium/radeon

Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>

1 files changed, 132 insertions, 0 deletions

diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index 44dd5fd..b46cc1c 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -27,6 +27,138 @@
 #include "si_shader.h"
 #include "gallivm/lp_bld_init.h"
 #include "gallivm/lp_bld_tgsi.h"
+#include "tgsi/tgsi_parse.h"
+
+#include <llvm-c/Core.h>
+#include <llvm-c/TargetMachine.h>
+
+struct pipe_debug_callback;
+struct radeon_shader_binary;
+
+#define RADEON_LLVM_MAX_INPUT_SLOTS 32
+#define RADEON_LLVM_MAX_INPUTS 32 * 4
+#define RADEON_LLVM_MAX_OUTPUTS 32 * 4
+
+#define RADEON_LLVM_INITIAL_CF_DEPTH 4
+
+#define RADEON_LLVM_MAX_SYSTEM_VALUES 4
+
+struct radeon_llvm_flow;
+
+struct radeon_llvm_context {
+	struct lp_build_tgsi_soa_context soa;
+
+	/*=== Front end configuration ===*/
+
+	/* Instructions that are not described by any of the TGSI opcodes. */
+
+	/** This function is responsible for initilizing the inputs array and will be
+	  * called once for each input declared in the TGSI shader.
+	  */
+	void (*load_input)(struct radeon_llvm_context *,
+			   unsigned input_index,
+			   const struct tgsi_full_declaration *decl,
+			   LLVMValueRef out[4]);
+
+	void (*load_system_value)(struct radeon_llvm_context *,
+				  unsigned index,
+				  const struct tgsi_full_declaration *decl);
+
+	void (*declare_memory_region)(struct radeon_llvm_context *,
+				      const struct tgsi_full_declaration *decl);
+
+	/** This array contains the input values for the shader.  Typically these
+	  * values will be in the form of a target intrinsic that will inform the
+	  * backend how to load the actual inputs to the shader.
+	  */
+	struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
+	LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
+	LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
+
+	/** This pointer is used to contain the temporary values.
+	  * The amount of temporary used in tgsi can't be bound to a max value and
+	  * thus we must allocate this array at runtime.
+	  */
+	LLVMValueRef *temps;
+	unsigned temps_count;
+	LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
+
+	/*=== Private Members ===*/
+
+	struct radeon_llvm_flow *flow;
+	unsigned flow_depth;
+	unsigned flow_depth_max;
+
+	struct tgsi_array_info *temp_arrays;
+	LLVMValueRef *temp_array_allocas;
+
+	LLVMValueRef undef_alloca;
+
+	LLVMValueRef main_fn;
+	LLVMTypeRef return_type;
+
+	unsigned fpmath_md_kind;
+	LLVMValueRef fpmath_md_2p5_ulp;
+
+	struct gallivm_state gallivm;
+};
+
+static inline struct radeon_llvm_context *
+radeon_llvm_context(struct lp_build_tgsi_context *bld_base)
+{
+	return (struct radeon_llvm_context*)bld_base;
+}
+
+void radeon_llvm_add_attribute(LLVMValueRef F, const char *name, int value);
+void radeon_llvm_shader_type(LLVMValueRef F, unsigned type);
+
+LLVMTargetRef radeon_llvm_get_r600_target(const char *triple);
+
+unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binary,
+			     LLVMTargetMachineRef tm,
+			     struct pipe_debug_callback *debug);
+
+LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
+			  enum tgsi_opcode_type type);
+
+LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
+		     enum tgsi_opcode_type type, LLVMValueRef value);
+
+LLVMValueRef radeon_llvm_bound_index(struct radeon_llvm_context *ctx,
+				     LLVMValueRef index,
+				     unsigned num);
+
+void radeon_llvm_context_init(struct radeon_llvm_context *ctx,
+                              const char *triple,
+			      const struct tgsi_shader_info *info,
+			      const struct tgsi_token *tokens);
+
+void radeon_llvm_create_func(struct radeon_llvm_context *ctx,
+			     LLVMTypeRef *return_types, unsigned num_return_elems,
+			     LLVMTypeRef *ParamTypes, unsigned ParamCount);
+
+void radeon_llvm_dispose(struct radeon_llvm_context *ctx);
+
+void radeon_llvm_finalize_module(struct radeon_llvm_context *ctx,
+				 bool run_verifier);
+
+LLVMValueRef radeon_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
+					  enum tgsi_opcode_type type,
+					  LLVMValueRef ptr,
+					  LLVMValueRef ptr2);
+
+LLVMValueRef radeon_llvm_saturate(struct lp_build_tgsi_context *bld_base,
+                                  LLVMValueRef value);
+
+LLVMValueRef radeon_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
+				    const struct tgsi_full_src_register *reg,
+				    enum tgsi_opcode_type type,
+				    unsigned swizzle);
+
+void radeon_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
+			    const struct tgsi_full_instruction *inst,
+			    const struct tgsi_opcode_info *info,
+			    LLVMValueRef dst[4]);
 
 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
 void si_prepare_cube_coords(struct lp_build_tgsi_context *bld_base,