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| author | Marek Olšák <marek.olsak@amd.com> | 2016-06-28 13:04:07 +0200 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2016-06-29 16:34:22 +0200 |
| commit | 4b11ef23b4c064a6db5fae313b4e2e6bf027c7e1 (patch) | |
| tree | 61d661546548a029b2fb9f963d5154565ad263d5 /src/gallium/drivers/radeonsi/si_state.c | |
| parent | 789ed13284cb99b96f2aa69f237959b27c5c3bc2 (diff) | |
| download | external_mesa3d-4b11ef23b4c064a6db5fae313b4e2e6bf027c7e1.zip external_mesa3d-4b11ef23b4c064a6db5fae313b4e2e6bf027c7e1.tar.gz external_mesa3d-4b11ef23b4c064a6db5fae313b4e2e6bf027c7e1.tar.bz2 | |
radeonsi: use conformant line rasterization
AA lines are not completely correct (see TODO), but everything else
should be.
+ 3 linestipple piglits
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 0a2fdbf..b21fa5c 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3805,7 +3805,15 @@ static void si_init_config(struct si_context *sctx) S_028034_BR_X(16384) | S_028034_BR_Y(16384)); si_pm4_set_reg(pm4, R_02820C_PA_SC_CLIPRECT_RULE, 0xFFFF); - si_pm4_set_reg(pm4, R_028230_PA_SC_EDGERULE, 0xAAAAAAAA); + si_pm4_set_reg(pm4, R_028230_PA_SC_EDGERULE, + S_028230_ER_TRI(0xA) | + S_028230_ER_POINT(0xA) | + S_028230_ER_RECT(0xA) | + /* Required by DX10_DIAMOND_TEST_ENA: */ + S_028230_ER_LINE_LR(0x1A) | + S_028230_ER_LINE_RL(0x26) | + S_028230_ER_LINE_TB(0xA) | + S_028230_ER_LINE_BT(0xA)); /* PA_SU_HARDWARE_SCREEN_OFFSET must be 0 due to hw bug on SI */ si_pm4_set_reg(pm4, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0); si_pm4_set_reg(pm4, R_028820_PA_CL_NANINF_CNTL, 0); |