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| author | Dave Airlie <airlied@redhat.com> | 2016-05-13 16:49:02 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2016-08-30 09:35:56 +1000 |
| commit | f235dc08ac1dcde6eff87597914583f5b2b9aa70 (patch) | |
| tree | ec3a53be77dd7af6d78a9462c8e7c5e27ad30209 /src/gallium/drivers/radeonsi/si_state.c | |
| parent | 5025e88703092cff45868d1637aa517d937081d7 (diff) | |
| download | external_mesa3d-f235dc08ac1dcde6eff87597914583f5b2b9aa70.zip external_mesa3d-f235dc08ac1dcde6eff87597914583f5b2b9aa70.tar.gz external_mesa3d-f235dc08ac1dcde6eff87597914583f5b2b9aa70.tar.bz2 | |
radeonsi: add support for cull distances. (v1.1)
This should be all that is required for cull distances to work
on radeonsi.
v1.1: whitespace cleanup, add docs fix clipdist_mask usage.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 25dfe26..375e74b 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -650,21 +650,22 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom) info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION]; unsigned clipdist_mask = info->writes_clipvertex ? SIX_BITS : info->clipdist_writemask; + unsigned total_mask = clipdist_mask | (info->culldist_writemask << info->num_written_clipdistance); radeon_set_context_reg(cs, R_02881C_PA_CL_VS_OUT_CNTL, S_02881C_USE_VTX_POINT_SIZE(info->writes_psize) | S_02881C_USE_VTX_EDGE_FLAG(info->writes_edgeflag) | S_02881C_USE_VTX_RENDER_TARGET_INDX(info->writes_layer) | S_02881C_USE_VTX_VIEWPORT_INDX(info->writes_viewport_index) | - S_02881C_VS_OUT_CCDIST0_VEC_ENA((clipdist_mask & 0x0F) != 0) | - S_02881C_VS_OUT_CCDIST1_VEC_ENA((clipdist_mask & 0xF0) != 0) | + S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0F) != 0) | + S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xF0) != 0) | S_02881C_VS_OUT_MISC_VEC_ENA(info->writes_psize || info->writes_edgeflag || info->writes_layer || info->writes_viewport_index) | S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(1) | (sctx->queued.named.rasterizer->clip_plane_enable & - clipdist_mask)); + clipdist_mask) | (info->culldist_writemask << 8)); radeon_set_context_reg(cs, R_028810_PA_CL_CLIP_CNTL, sctx->queued.named.rasterizer->pa_cl_clip_cntl | (clipdist_mask ? 0 : |