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author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-07-16 20:37:29 +0200 |
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committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-07-23 15:36:38 +0200 |
commit | f755da0f2f8609e603b50424aa254358eb72fa25 (patch) | |
tree | 0d0cfcf2a8a2e49109461ad37a8e4cb74bf3586a /src/gallium/drivers/radeonsi/si_state.c | |
parent | abb2a865a49b0a4c3d2c0a4a0024d72784393188 (diff) | |
download | external_mesa3d-f755da0f2f8609e603b50424aa254358eb72fa25.zip external_mesa3d-f755da0f2f8609e603b50424aa254358eb72fa25.tar.gz external_mesa3d-f755da0f2f8609e603b50424aa254358eb72fa25.tar.bz2 |
radeonsi: fix Polaris MSAA regression
The regression was introduced by commit d938b8c. The problem here is that in
order to use the small primitive filter, we need to explicitly set the sample
locations to 0. But the DB doesn't properly process the change of sample
locations without a flush, and so we can end up with incorrect Z values.
Instead of doing a flush, just disable the small primitive filter when MSAA
is force-disabled.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96908
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 34 |
1 files changed, 19 insertions, 15 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index f801ca5..c5b61e9 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2569,22 +2569,31 @@ static void si_emit_msaa_sample_locs(struct si_context *sctx, if (nr_samples <= 1 && sctx->smoothing_enabled) nr_samples = SI_NUM_SMOOTH_AA_SAMPLES; - /* The small primitive filter on Polaris requires explicitly setting - * sample locations to 0 when MSAA is disabled. + /* On Polaris, the small primitive filter uses the sample locations + * even when MSAA is off, so we need to make sure they're set to 0. */ - if (sctx->b.family >= CHIP_POLARIS10) { - struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; - - if (!sctx->smoothing_enabled && - rs && !rs->multisample_enable) - nr_samples = 1; - } - if ((nr_samples > 1 || sctx->b.family >= CHIP_POLARIS10) && (nr_samples != sctx->msaa_sample_locs.nr_samples)) { sctx->msaa_sample_locs.nr_samples = nr_samples; cayman_emit_msaa_sample_locs(cs, nr_samples); } + + if (sctx->b.family >= CHIP_POLARIS10) { + struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; + unsigned small_prim_filter_cntl = + S_028830_SMALL_PRIM_FILTER_ENABLE(1) | + S_028830_LINE_FILTER_DISABLE(1); /* line bug */ + + /* The alternative of setting sample locations to 0 would + * require a DB flush to avoid Z errors, see + * https://bugs.freedesktop.org/show_bug.cgi?id=96908 + */ + if (sctx->framebuffer.nr_samples > 1 && rs && !rs->multisample_enable) + small_prim_filter_cntl &= C_028830_SMALL_PRIM_FILTER_ENABLE; + + radeon_set_context_reg(cs, R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL, + small_prim_filter_cntl); + } } static void si_emit_msaa_config(struct si_context *sctx, struct r600_atom *atom) @@ -3957,11 +3966,6 @@ static void si_init_config(struct si_context *sctx) if (sctx->b.family == CHIP_STONEY) si_pm4_set_reg(pm4, R_028C40_PA_SC_SHADER_CONTROL, 0); - if (sctx->b.family >= CHIP_POLARIS10) - si_pm4_set_reg(pm4, R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL, - S_028830_SMALL_PRIM_FILTER_ENABLE(1) | - S_028830_LINE_FILTER_DISABLE(1)); /* line bug */ - si_pm4_set_reg(pm4, R_028080_TA_BC_BASE_ADDR, border_color_va >> 8); if (sctx->b.chip_class >= CIK) si_pm4_set_reg(pm4, R_028084_TA_BC_BASE_ADDR_HI, border_color_va >> 40); |