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authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>2016-06-06 22:36:35 +0200
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>2016-06-10 12:18:29 +0200
commit54f755fa0fda14c578022767bcef2f27b2e89707 (patch)
tree3d923c25cd64d24f7965e550009c37d97a5f63a7 /src/gallium/drivers/radeonsi/si_state.h
parentf93c22109e281ee927c3bb349b94a43fd47ed9ad (diff)
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radeonsi: Reinitialize all descriptors in CE preamble.
This fixes a problem with the CE preamble and restoring only stuff in the preamble when needed. To illustrate suppose we have two graphics IB's 1 and 2, which are submitted in that order. Furthermore suppose IB 1 does not use CE ram, but IB 2 does, and we have a context switch at the start of IB 1, but not between IB 1 and IB 2. The old code put the CE RAM loads in the preamble of IB 2. As the preamble of IB 1 does not have the loads and the preamble of IB 2 does not get executed, the old values are not load into CE RAM. Fix this by always restoring the entire CE RAM. v2: - Just load all descriptor set buffers instead of load and store the entire CE RAM. - Leave the ce_ram_dirty tracking in place for the non-preamble case. v3: - Fixed parameter alignment. - Rebased to master (Nicolai's descriptor series). Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.h')
-rw-r--r--src/gallium/drivers/radeonsi/si_state.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index a4a58bb..ab34fec 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -276,6 +276,7 @@ struct si_buffer_resources {
} while(0)
/* si_descriptors.c */
+void si_ce_reinitialize_all_descriptors(struct si_context *sctx);
void si_ce_enable_loads(struct radeon_winsys_cs *ib);
void si_set_mutable_tex_desc_fields(struct r600_texture *tex,
const struct radeon_surf_level *base_level_info,