summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_state_draw.c
diff options
context:
space:
mode:
authorMarek Olšák <marek.olsak@amd.com>2015-09-26 23:18:55 +0200
committerMarek Olšák <marek.olsak@amd.com>2015-10-03 22:06:07 +0200
commit2edb0606397d16fe88d7b488285df379aaae5893 (patch)
treefb06578d805c2e08a0d957bf6ff395e4198ca500 /src/gallium/drivers/radeonsi/si_state_draw.c
parent9bd7928a35c27d3d0898db83bc8db823a6dbee5e (diff)
downloadexternal_mesa3d-2edb0606397d16fe88d7b488285df379aaae5893.zip
external_mesa3d-2edb0606397d16fe88d7b488285df379aaae5893.tar.gz
external_mesa3d-2edb0606397d16fe88d7b488285df379aaae5893.tar.bz2
gallium/radeon: tell the winsys the exact resource binding types
Use the priority flags and expand them. This information will be used for debugging. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state_draw.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 6d8e0e5..fb65eb3 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -353,7 +353,7 @@ static void si_emit_scratch_reloc(struct si_context *sctx)
if (sctx->scratch_buffer) {
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx,
sctx->scratch_buffer, RADEON_USAGE_READWRITE,
- RADEON_PRIO_SHADER_RESOURCE_RW);
+ RADEON_PRIO_SCRATCH_BUFFER);
}
sctx->emit_scratch_reloc = false;
@@ -467,7 +467,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx,
t->buf_filled_size, RADEON_USAGE_READ,
- RADEON_PRIO_MIN);
+ RADEON_PRIO_SO_FILLED_SIZE);
}
/* draw packet */
@@ -521,7 +521,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx,
(struct r600_resource *)info->indirect,
- RADEON_USAGE_READ, RADEON_PRIO_MIN);
+ RADEON_USAGE_READ, RADEON_PRIO_DRAW_INDIRECT);
}
if (info->indexed) {
@@ -531,7 +531,7 @@ static void si_emit_draw_packets(struct si_context *sctx,
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx,
(struct r600_resource *)ib->buffer,
- RADEON_USAGE_READ, RADEON_PRIO_MIN);
+ RADEON_USAGE_READ, RADEON_PRIO_INDEX_BUFFER);
if (info->indirect) {
uint64_t indirect_va = r600_resource(info->indirect)->gpu_address;
@@ -883,7 +883,7 @@ void si_trace_emit(struct si_context *sctx)
sctx->trace_id++;
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx, sctx->trace_buf,
- RADEON_USAGE_READWRITE, RADEON_PRIO_MIN);
+ RADEON_USAGE_READWRITE, RADEON_PRIO_TRACE);
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0));
radeon_emit(cs, S_370_DST_SEL(V_370_MEMORY_SYNC) |
S_370_WR_CONFIRM(1) |