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author | Marek Olšák <marek.olsak@amd.com> | 2016-10-10 18:51:24 +0200 |
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committer | Marek Olšák <marek.olsak@amd.com> | 2016-10-12 18:29:40 +0200 |
commit | 40e1f7e09bf1bc9b8ed6f847562bbb7154025420 (patch) | |
tree | 914d8dab62758e5488cda94e215804aee916cc23 /src/gallium/drivers/radeonsi/si_state_draw.c | |
parent | 8cdce30cc20983dcb971dd906a9a9007e282081d (diff) | |
download | external_mesa3d-40e1f7e09bf1bc9b8ed6f847562bbb7154025420.zip external_mesa3d-40e1f7e09bf1bc9b8ed6f847562bbb7154025420.tar.gz external_mesa3d-40e1f7e09bf1bc9b8ed6f847562bbb7154025420.tar.bz2 |
radeonsi: use TC write-back instead of full cache invalidation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state_draw.c')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 33b6b23..c14e852 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -1047,18 +1047,18 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) /* VI reads index buffers through TC L2. */ if (info->indexed && sctx->b.chip_class <= CIK && r600_resource(ib.buffer)->TC_L2_dirty) { - sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; + sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; r600_resource(ib.buffer)->TC_L2_dirty = false; } if (info->indirect && r600_resource(info->indirect)->TC_L2_dirty) { - sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; + sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; r600_resource(info->indirect)->TC_L2_dirty = false; } if (info->indirect_params && r600_resource(info->indirect_params)->TC_L2_dirty) { - sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; + sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; r600_resource(info->indirect_params)->TC_L2_dirty = false; } |