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| author | Marek Olšák <marek.olsak@amd.com> | 2016-09-30 22:47:20 +0200 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2016-10-04 16:11:56 +0200 |
| commit | 82e51e818849f8f8600456fa476654630792bcf9 (patch) | |
| tree | ba8e57ca0eb9ad88a0edfa3e57c163e134104c9b /src/gallium/drivers/radeonsi/si_state_draw.c | |
| parent | 3ee9be42ac6f0c3d841c4136419a759c014d43eb (diff) | |
| download | external_mesa3d-82e51e818849f8f8600456fa476654630792bcf9.zip external_mesa3d-82e51e818849f8f8600456fa476654630792bcf9.tar.gz external_mesa3d-82e51e818849f8f8600456fa476654630792bcf9.tar.bz2 | |
radeonsi: separate IA_MULTI_VGT_PARAM and VGT_PRIMITIVE_TYPE emission
We want to emit IA_MULTI_VGT_PARAM less often because it's a context reg.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state_draw.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 41cc026..051ea9e 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -473,18 +473,21 @@ static void si_emit_draw_registers(struct si_context *sctx, ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info, num_patches); /* Draw state. */ - if (prim != sctx->last_prim || - ia_multi_vgt_param != sctx->last_multi_vgt_param) { - if (sctx->b.chip_class >= CIK) { + if (ia_multi_vgt_param != sctx->last_multi_vgt_param) { + if (sctx->b.chip_class >= CIK) radeon_set_context_reg_idx(cs, R_028AA8_IA_MULTI_VGT_PARAM, 1, ia_multi_vgt_param); + else + radeon_set_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param); + + sctx->last_multi_vgt_param = ia_multi_vgt_param; + } + if (prim != sctx->last_prim) { + if (sctx->b.chip_class >= CIK) radeon_set_uconfig_reg_idx(cs, R_030908_VGT_PRIMITIVE_TYPE, 1, prim); - } else { + else radeon_set_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE, prim); - radeon_set_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param); - } sctx->last_prim = prim; - sctx->last_multi_vgt_param = ia_multi_vgt_param; } if (gs_out_prim != sctx->last_gs_out_prim) { |