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| author | Marek Olšák <marek.olsak@amd.com> | 2016-09-06 00:35:12 +0200 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2016-09-07 11:13:13 +0200 |
| commit | fe40a65fb6210206720776662f202879777057cd (patch) | |
| tree | 05c051b4814fea321fc85ffadf8cdba8e751bd84 /src/gallium/drivers/radeonsi/si_state_draw.c | |
| parent | bdf767dac4d6229bc80642bb806cc56f6d440cfc (diff) | |
| download | external_mesa3d-fe40a65fb6210206720776662f202879777057cd.zip external_mesa3d-fe40a65fb6210206720776662f202879777057cd.tar.gz external_mesa3d-fe40a65fb6210206720776662f202879777057cd.tar.bz2 | |
radeonsi: skip redundant INDEX_TYPE writes
Ported from Vulkan.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state_draw.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 50 |
1 files changed, 30 insertions, 20 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index d4447a9..d7325ff 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -553,26 +553,30 @@ static void si_emit_draw_packets(struct si_context *sctx, /* draw packet */ if (info->indexed) { - radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); - - /* index type */ - switch (ib->index_size) { - case 1: - radeon_emit(cs, V_028A7C_VGT_INDEX_8); - break; - case 2: - radeon_emit(cs, V_028A7C_VGT_INDEX_16 | - (SI_BIG_ENDIAN && sctx->b.chip_class <= CIK ? - V_028A7C_VGT_DMA_SWAP_16_BIT : 0)); - break; - case 4: - radeon_emit(cs, V_028A7C_VGT_INDEX_32 | - (SI_BIG_ENDIAN && sctx->b.chip_class <= CIK ? - V_028A7C_VGT_DMA_SWAP_32_BIT : 0)); - break; - default: - assert(!"unreachable"); - return; + if (ib->index_size != sctx->last_index_size) { + radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); + + /* index type */ + switch (ib->index_size) { + case 1: + radeon_emit(cs, V_028A7C_VGT_INDEX_8); + break; + case 2: + radeon_emit(cs, V_028A7C_VGT_INDEX_16 | + (SI_BIG_ENDIAN && sctx->b.chip_class <= CIK ? + V_028A7C_VGT_DMA_SWAP_16_BIT : 0)); + break; + case 4: + radeon_emit(cs, V_028A7C_VGT_INDEX_32 | + (SI_BIG_ENDIAN && sctx->b.chip_class <= CIK ? + V_028A7C_VGT_DMA_SWAP_32_BIT : 0)); + break; + default: + assert(!"unreachable"); + return; + } + + sctx->last_index_size = ib->index_size; } index_max_size = (ib->buffer->width0 - ib->offset) / @@ -582,6 +586,12 @@ static void si_emit_draw_packets(struct si_context *sctx, radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, (struct r600_resource *)ib->buffer, RADEON_USAGE_READ, RADEON_PRIO_INDEX_BUFFER); + } else { + /* On CI and later, non-indexed draws overwrite VGT_INDEX_TYPE, + * so the state must be re-emitted before the next indexed draw. + */ + if (sctx->b.chip_class >= CIK) + sctx->last_index_size = -1; } if (!info->indirect) { |