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| author | Eric Anholt <eric@anholt.net> | 2015-11-20 17:18:03 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2015-12-04 09:23:55 -0800 |
| commit | 74c4b3b80cc4246fd1eb503d97edb3d293eef5de (patch) | |
| tree | 8a2abe8d61c1bc772c249c2f78db25fb2bee8895 /src/gallium/drivers/vc4/vc4_qir.h | |
| parent | 3a508a0d94d020d9cd95f8882e9393d83ffac377 (diff) | |
| download | external_mesa3d-74c4b3b80cc4246fd1eb503d97edb3d293eef5de.zip external_mesa3d-74c4b3b80cc4246fd1eb503d97edb3d293eef5de.tar.gz external_mesa3d-74c4b3b80cc4246fd1eb503d97edb3d293eef5de.tar.bz2 | |
vc4: Add support for storing sample mask.
From the API perspective, writing 1 bits can't turn on pixels that were
off, so we AND it with the sample mask from the payload.
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_qir.h')
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_qir.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h index ad243ec..97a23df1 100644 --- a/src/gallium/drivers/vc4/vc4_qir.h +++ b/src/gallium/drivers/vc4/vc4_qir.h @@ -122,6 +122,7 @@ enum qop { QOP_TLB_Z_WRITE, QOP_TLB_COLOR_WRITE, QOP_TLB_COLOR_READ, + QOP_MS_MASK, QOP_VARY_ADD_C, QOP_FRAG_X, @@ -397,6 +398,7 @@ struct vc4_compile { uint32_t output_position_index; uint32_t output_color_index; uint32_t output_point_size_index; + uint32_t output_sample_mask_index; struct qreg undef; enum qstage stage; @@ -620,6 +622,7 @@ QIR_NODST_1(TLB_COLOR_WRITE) QIR_NODST_1(TLB_Z_WRITE) QIR_NODST_1(TLB_DISCARD_SETUP) QIR_NODST_1(TLB_STENCIL_SETUP) +QIR_NODST_1(MS_MASK) static inline struct qreg qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i) |