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| author | Eric Anholt <eric@anholt.net> | 2014-12-15 12:30:26 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2014-12-15 14:33:01 -0800 |
| commit | 48a2154520351a22fc860efcdaa4329a51d29c8d (patch) | |
| tree | cccb279fea71ccd85c0dda762fe8898408a9f00b /src/gallium/drivers/vc4/vc4_qpu_emit.c | |
| parent | 9ca32d6c19489653222ff1084856fa5584932b66 (diff) | |
| download | external_mesa3d-48a2154520351a22fc860efcdaa4329a51d29c8d.zip external_mesa3d-48a2154520351a22fc860efcdaa4329a51d29c8d.tar.gz external_mesa3d-48a2154520351a22fc860efcdaa4329a51d29c8d.tar.bz2 | |
vc4: Add support for 16-bit signed/unsigned norm/scaled vertex attrs.
Diffstat (limited to 'src/gallium/drivers/vc4/vc4_qpu_emit.c')
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_qpu_emit.c | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c b/src/gallium/drivers/vc4/vc4_qpu_emit.c index f880727..530ec8b 100644 --- a/src/gallium/drivers/vc4/vc4_qpu_emit.c +++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c @@ -141,6 +141,15 @@ vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c) uint32_t vpm_read_offset = 0; bool written_r3 = false; bool needs_restore; + /* Map from the QIR ops enum order to QPU unpack bits. */ + static const uint32_t unpack_map[] = { + QPU_UNPACK_8A, + QPU_UNPACK_8B, + QPU_UNPACK_8C, + QPU_UNPACK_8D, + QPU_UNPACK_16A_TO_F32, + QPU_UNPACK_16B_TO_F32, + }; make_empty_list(&c->qpu_inst_list); @@ -472,6 +481,8 @@ vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c) case QOP_UNPACK_8B_F: case QOP_UNPACK_8C_F: case QOP_UNPACK_8D_F: + case QOP_UNPACK_16A_F: + case QOP_UNPACK_16B_F: { assert(src[0].mux == QPU_MUX_A); /* Since we're setting the pack bits, if the @@ -480,20 +491,22 @@ vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c) queue(c, qpu_a_FMAX((dst.mux == QPU_MUX_A ? qpu_rb(31) : dst), src[0], src[0])); - *last_inst(c) |= QPU_SET_FIELD(QPU_UNPACK_8A + - (qinst->op - - QOP_UNPACK_8A_F), + *last_inst(c) |= QPU_SET_FIELD(unpack_map[qinst->op - + QOP_UNPACK_8A_F], QPU_UNPACK); if (dst.mux == QPU_MUX_A) { queue(c, qpu_a_MOV(dst, qpu_rb(31))); } + } break; case QOP_UNPACK_8A_I: case QOP_UNPACK_8B_I: case QOP_UNPACK_8C_I: case QOP_UNPACK_8D_I: + case QOP_UNPACK_16A_I: + case QOP_UNPACK_16B_I: { assert(src[0].mux == QPU_MUX_A); /* Since we're setting the pack bits, if the @@ -501,14 +514,14 @@ vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c) */ queue(c, qpu_a_MOV((dst.mux == QPU_MUX_A ? qpu_rb(31) : dst), src[0])); - *last_inst(c) |= QPU_SET_FIELD(QPU_UNPACK_8A + - (qinst->op - - QOP_UNPACK_8A_I), + *last_inst(c) |= QPU_SET_FIELD(unpack_map[qinst->op - + QOP_UNPACK_8A_I], QPU_UNPACK); if (dst.mux == QPU_MUX_A) { queue(c, qpu_a_MOV(dst, qpu_rb(31))); } + } break; default: |