summaryrefslogtreecommitdiffstats
path: root/src/gallium/targets/opencl
diff options
context:
space:
mode:
authorRob Clark <robclark@freedesktop.org>2014-02-15 19:01:38 -0500
committerRob Clark <robclark@freedesktop.org>2014-02-16 08:17:23 -0500
commitd73b2c0517feb37a77d1b28b6cc063d699374867 (patch)
treea5d00295cc0d314df881ba9b3ab6ee355ef5baba /src/gallium/targets/opencl
parente8cca57a3f709b9b8bce0b25290d6d8091bbdda7 (diff)
downloadexternal_mesa3d-d73b2c0517feb37a77d1b28b6cc063d699374867.zip
external_mesa3d-d73b2c0517feb37a77d1b28b6cc063d699374867.tar.gz
external_mesa3d-d73b2c0517feb37a77d1b28b6cc063d699374867.tar.bz2
freedreno/a3xx/compiler: use (ss) for WAR hazards
Seems texture sample instructions don't immediately consume there src(s). In fact, some shaders from blob compiler seem to indiciate that it does not even count the texture sample instructions when calculating number of delay slots to fill for non-sample instructions. (Although so far it seems inconclusive as to whether this is required.) In particular, when a src register of a previous texture sample instruction is clobbered, the (ss) bit is needed to synchronize with the tex pipeline to ensure it has picked up the previous values before they are overwritten. Signed-off-by: Rob Clark <robclark@freedesktop.org>
Diffstat (limited to 'src/gallium/targets/opencl')
0 files changed, 0 insertions, 0 deletions