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| author | Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> | 2016-03-25 02:06:50 +0100 |
|---|---|---|
| committer | Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> | 2016-04-02 01:51:13 +0200 |
| commit | 1a5c8c24b5791efa02a7beefa4ba1c49ae033c73 (patch) | |
| tree | c63783871510b1ba41d5a12f187f51a336a6b79a /src/gallium/tests | |
| parent | be5899dcf9a337548d8095a00060d4451b0df222 (diff) | |
| download | external_mesa3d-1a5c8c24b5791efa02a7beefa4ba1c49ae033c73.zip external_mesa3d-1a5c8c24b5791efa02a7beefa4ba1c49ae033c73.tar.gz external_mesa3d-1a5c8c24b5791efa02a7beefa4ba1c49ae033c73.tar.bz2 | |
gallium: distinguish between shader IR in get_compute_param
For radeonsi, native and TGSI use different compilers and this results
in different limits for different IR's.
The set we strictly need for radeonsi is only the MAX_BLOCK_SIZE
and MAX_THREADS_PER_BLOCK params, but I added a few others as shader
related that seemed like they would also typically depend on the
compiler.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'src/gallium/tests')
| -rw-r--r-- | src/gallium/tests/trivial/compute.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/tests/trivial/compute.c b/src/gallium/tests/trivial/compute.c index 2ddfc42..5d012ac 100644 --- a/src/gallium/tests/trivial/compute.c +++ b/src/gallium/tests/trivial/compute.c @@ -58,7 +58,9 @@ struct context { uint64_t __v[4]; \ int __i, __n; \ \ - __n = ctx->screen->get_compute_param(ctx->screen, c, __v); \ + __n = ctx->screen->get_compute_param(ctx->screen, \ + PIPE_SHADER_IR_TGSI, \ + c, __v); \ printf("%s: {", #c); \ \ for (__i = 0; __i < __n / sizeof(*__v); ++__i) \ |