diff options
| author | Marek Olšák <marek.olsak@amd.com> | 2015-09-10 18:27:53 +0200 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2015-09-24 19:51:42 +0200 |
| commit | 22d3ccf5a814bfc768e373d0c983a356f4e4efe3 (patch) | |
| tree | 85016982cc575ac9ccd2f59c8bd76ddb51c9b996 /src/gallium | |
| parent | 5c219ab55239ceef3285262ff68a502e419061e0 (diff) | |
| download | external_mesa3d-22d3ccf5a814bfc768e373d0c983a356f4e4efe3.zip external_mesa3d-22d3ccf5a814bfc768e373d0c983a356f4e4efe3.tar.gz external_mesa3d-22d3ccf5a814bfc768e373d0c983a356f4e4efe3.tar.bz2 | |
radeonsi: skip drawing if the tess factor ring allocation fails
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.h | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_shaders.c | 11 |
3 files changed, 12 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index 900b70f..3fc0799 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -277,7 +277,7 @@ si_create_sampler_view_custom(struct pipe_context *ctx, unsigned force_level); /* si_state_shader.c */ -void si_update_shaders(struct si_context *sctx); +bool si_update_shaders(struct si_context *sctx); void si_init_shader_functions(struct si_context *sctx); /* si_state_draw.c */ diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index b4c59f8..6d8e0e5 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -759,8 +759,8 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) else sctx->current_rast_prim = info->mode; - si_update_shaders(sctx); - if (!si_upload_shader_descriptors(sctx)) + if (!si_update_shaders(sctx) || + !si_upload_shader_descriptors(sctx)) return; if (info->indexed) { diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 1f1965f..11b58e8 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -1279,6 +1279,9 @@ static void si_init_tess_factor_ring(struct si_context *sctx) sctx->tf_ring = pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM, PIPE_USAGE_DEFAULT, 32768 * sctx->screen->b.info.max_se); + if (!sctx->tf_ring) + return; + assert(((sctx->tf_ring->width0 / 4) & C_030938_SIZE) == 0); /* Append these registers to the init config state. */ @@ -1385,15 +1388,18 @@ static void si_update_so(struct si_context *sctx, struct si_shader_selector *sha sctx->b.streamout.stride_in_dw = shader->so.stride; } -void si_update_shaders(struct si_context *sctx) +bool si_update_shaders(struct si_context *sctx) { struct pipe_context *ctx = (struct pipe_context*)sctx; struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; /* Update stages before GS. */ if (sctx->tes_shader) { - if (!sctx->tf_ring) + if (!sctx->tf_ring) { si_init_tess_factor_ring(sctx); + if (!sctx->tf_ring) + return false; + } /* VS as LS */ si_shader_select(ctx, sctx->vs_shader); @@ -1487,6 +1493,7 @@ void si_update_shaders(struct si_context *sctx) if (sctx->b.chip_class == SI) si_mark_atom_dirty(sctx, &sctx->db_render_state); } + return true; } void si_init_shader_functions(struct si_context *sctx) |