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| author | Marek Olšák <marek.olsak@amd.com> | 2016-10-24 19:05:10 +0200 |
|---|---|---|
| committer | Emil Velikov <emil.l.velikov@gmail.com> | 2016-10-27 11:24:02 +0100 |
| commit | 9c5bbfcbc8a855a46f6b9707f6958206bac46cfc (patch) | |
| tree | 599731a637e73d1fc50b997c44981f781dc90451 /src/gallium | |
| parent | cf82ceb21e789d350c236e37a478b80ce191ebb0 (diff) | |
| download | external_mesa3d-9c5bbfcbc8a855a46f6b9707f6958206bac46cfc.zip external_mesa3d-9c5bbfcbc8a855a46f6b9707f6958206bac46cfc.tar.gz external_mesa3d-9c5bbfcbc8a855a46f6b9707f6958206bac46cfc.tar.bz2 | |
winsys/amdgpu: fix radeon_surf::macro_tile_index for imported textures
Maybe this is why SDMA has been broken for many amdgpu users?
SDMA is the only block which is used with imported textures and relies
on this variable. DB also uses it, but it doesn't get imported textures,
so it's unaffected.
I do get SDMA failures on Tonga before this patch if R600_DEBUG=testdma
is changed to use imported textures.
Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 6ec3b2a4b1d41b83a4721d06b42c49f55e695cbf)
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c index 1bf07a7..c5462bc 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c @@ -303,6 +303,20 @@ static void set_micro_tile_mode(struct radeon_surf *surf, surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode); } +static unsigned cik_get_macro_tile_index(struct radeon_surf *surf) +{ + unsigned index, tileb; + + tileb = 8 * 8 * surf->bpe; + tileb = MIN2(surf->tile_split, tileb); + + for (index = 0; tileb > 64; index++) + tileb >>= 1; + + assert(index < 16); + return index; +} + static int amdgpu_surface_init(struct radeon_winsys *rws, struct radeon_surf *surf) { @@ -475,6 +489,9 @@ static int amdgpu_surface_init(struct radeon_winsys *rws, AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */ else AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */ + + /* Addrlib doesn't set this if tileIndex is forced like above. */ + AddrSurfInfoOut.macroModeIndex = cik_get_macro_tile_index(surf); } } |