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| author | Kenneth Graunke <kenneth@whitecape.org> | 2013-07-09 20:47:54 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2013-07-18 16:03:19 -0700 |
| commit | 7791c9869b233e45a9089eae124dc9aa4f4e519a (patch) | |
| tree | f483a5d724e1b98641792f9dbe6125a262be99ab /src/glx | |
| parent | 6368478712ab46edc18f2210527259d4d433235a (diff) | |
| download | external_mesa3d-7791c9869b233e45a9089eae124dc9aa4f4e519a.zip external_mesa3d-7791c9869b233e45a9089eae124dc9aa4f4e519a.tar.gz external_mesa3d-7791c9869b233e45a9089eae124dc9aa4f4e519a.tar.bz2 | |
i965: Add #defines for Memory Object Control State fields on Gen7-7.5.
The L3 controls are identical on all platforms, but LLC differs:
- Ivybridge has a "cache in LLC" flag
- Baytrail has no LLC, but instead has a snoop bit:
"data accesses in this page must be snooped in the CPU caches."
- Haswell has writeback/uncached flags for LLC and eLLC (eDRAM).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Diffstat (limited to 'src/glx')
0 files changed, 0 insertions, 0 deletions