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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-03-04 10:45:24 -0800 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-03-04 12:03:00 -0800 |
| commit | ec18fef88d8a7a1a3541b0d40708a6637412f50e (patch) | |
| tree | 483283fddd7511a789de1dadb93ba5687c2e9758 /src/intel/vulkan/gen8_cmd_buffer.c | |
| parent | fcd8e571851c18a259fdc4ccb34f6ba23f3d29ea (diff) | |
| download | external_mesa3d-ec18fef88d8a7a1a3541b0d40708a6637412f50e.zip external_mesa3d-ec18fef88d8a7a1a3541b0d40708a6637412f50e.tar.gz external_mesa3d-ec18fef88d8a7a1a3541b0d40708a6637412f50e.tar.bz2 | |
anv/pipeline: Set StencilBufferWriteEnable from the pipeline
The hardware docs say that StencilBufferWriteEnable should only be set if
StencilTestEnable is set. It seems reasonable to set them together.
Diffstat (limited to 'src/intel/vulkan/gen8_cmd_buffer.c')
| -rw-r--r-- | src/intel/vulkan/gen8_cmd_buffer.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c index d506cf4..8e7a078 100644 --- a/src/intel/vulkan/gen8_cmd_buffer.c +++ b/src/intel/vulkan/gen8_cmd_buffer.c @@ -384,9 +384,6 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer) struct GENX(3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil) = { GENX(3DSTATE_WM_DEPTH_STENCIL_header), - .StencilBufferWriteEnable = d->stencil_write_mask.front != 0 || - d->stencil_write_mask.back != 0, - .StencilTestMask = d->stencil_compare_mask.front & 0xff, .StencilWriteMask = d->stencil_write_mask.front & 0xff, |