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| author | Lionel Landwerlin <llandwerlin@gmail.com> | 2016-08-08 20:30:08 +0100 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-08-08 14:44:25 -0700 |
| commit | 8cde4ddbce330a45d27a350c7f4f18641d34fdd8 (patch) | |
| tree | 8d8b172e0c0ee2a14babbedb9983c1906756fc2c /src/intel/vulkan/gen8_pipeline.c | |
| parent | a3c472a2ec58038c5cd6b61f0c33260d38cd816e (diff) | |
| download | external_mesa3d-8cde4ddbce330a45d27a350c7f4f18641d34fdd8.zip external_mesa3d-8cde4ddbce330a45d27a350c7f4f18641d34fdd8.tar.gz external_mesa3d-8cde4ddbce330a45d27a350c7f4f18641d34fdd8.tar.bz2 | |
anv/pipeline/gen7: Set multisample modes
Fixes the following failures :
dEQP-VK.api.copy_and_blit.resolve_image.whole_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.whole_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.partial_8_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_4_bit
dEQP-VK.api.copy_and_blit.resolve_image.with_regions_8_bit
Tested on IVB/HSW
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Diffstat (limited to 'src/intel/vulkan/gen8_pipeline.c')
| -rw-r--r-- | src/intel/vulkan/gen8_pipeline.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c index d16ce7b..1840ce2 100644 --- a/src/intel/vulkan/gen8_pipeline.c +++ b/src/intel/vulkan/gen8_pipeline.c @@ -120,7 +120,7 @@ genX(graphics_pipeline_create)( emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra); assert(pCreateInfo->pRasterizationState); emit_rs_state(pipeline, pCreateInfo->pRasterizationState, - pass, subpass, extra); + pCreateInfo->pMultisampleState, pass, subpass, extra); emit_ms_state(pipeline, pCreateInfo->pMultisampleState); emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass); emit_cb_state(pipeline, pCreateInfo->pColorBlendState, |