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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-02-20 09:08:27 -0800 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-02-20 09:09:28 -0800 |
| commit | 371b4a5b33a13f35fa7783510d2d90685a9a2e8a (patch) | |
| tree | e621abce65fefe7eae5af2417ef6c137c14a4324 /src/intel/vulkan/genX_cmd_buffer.c | |
| parent | 0d76aa94855462cbd6094897d3de831d15d23297 (diff) | |
| download | external_mesa3d-371b4a5b33a13f35fa7783510d2d90685a9a2e8a.zip external_mesa3d-371b4a5b33a13f35fa7783510d2d90685a9a2e8a.tar.gz external_mesa3d-371b4a5b33a13f35fa7783510d2d90685a9a2e8a.tar.bz2 | |
anv: Switch over to the macros in genxml
Diffstat (limited to 'src/intel/vulkan/genX_cmd_buffer.c')
| -rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 25 |
1 files changed, 9 insertions, 16 deletions
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 5498d1d..9be87a3 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -26,15 +26,8 @@ #include "anv_private.h" -#if (ANV_GEN == 9) -# include "genxml/gen9_pack.h" -#elif (ANV_GEN == 8) -# include "genxml/gen8_pack.h" -#elif (ANV_IS_HASWELL) -# include "genxml/gen75_pack.h" -#elif (ANV_GEN == 7) -# include "genxml/gen7_pack.h" -#endif +#include "genxml/gen_macros.h" +#include "genxml/genX_pack.h" void genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer) @@ -48,7 +41,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer) scratch_bo = &device->scratch_block_pool.bo; /* XXX: Do we need this on more than just BDW? */ -#if (ANV_GEN >= 8) +#if (GEN_GEN >= 8) /* Emit a render target cache flush. * * This isn't documented anywhere in the PRM. However, it seems to be @@ -81,7 +74,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer) .InstructionMemoryObjectControlState = GENX(MOCS), .InstructionBaseAddressModifyEnable = true, -# if (ANV_GEN >= 8) +# if (GEN_GEN >= 8) /* Broadwell requires that we specify a buffer size for a bunch of * these fields. However, since we will be growing the BO's live, we * just set them all to the maximum. @@ -288,7 +281,7 @@ emit_base_vertex_instance_bo(struct anv_cmd_buffer *cmd_buffer, .VertexBufferIndex = 32, /* Reserved for this */ .AddressModifyEnable = true, .BufferPitch = 0, -#if (ANV_GEN >= 8) +#if (GEN_GEN >= 8) .MemoryObjectControlState = GENX(MOCS), .BufferStartingAddress = { bo, offset }, .BufferSize = 8 @@ -543,7 +536,7 @@ genX(flush_pipeline_select_3d)(struct anv_cmd_buffer *cmd_buffer) { if (cmd_buffer->state.current_pipeline != _3D) { anv_batch_emit(&cmd_buffer->batch, GENX(PIPELINE_SELECT), -#if ANV_GEN >= 9 +#if GEN_GEN >= 9 .MaskBits = 3, #endif .PipelineSelection = _3D); @@ -587,7 +580,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) .Depth = 1 - 1, .MinimumArrayElement = 0, .DepthBufferObjectControlState = GENX(MOCS), -#if ANV_GEN >= 8 +#if GEN_GEN >= 8 .SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&image->depth_surface.isl) >> 2, #endif .RenderTargetViewExtent = 1 - 1); @@ -620,7 +613,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) /* Emit 3DSTATE_STENCIL_BUFFER */ if (has_stencil) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER), -#if ANV_GEN >= 8 || ANV_IS_HASWELL +#if GEN_GEN >= 8 || GEN_IS_HASWELL .StencilBufferEnable = true, #endif .StencilBufferObjectControlState = GENX(MOCS), @@ -632,7 +625,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) */ .SurfacePitch = 2 * image->stencil_surface.isl.row_pitch - 1, -#if ANV_GEN >= 8 +#if GEN_GEN >= 8 .SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&image->stencil_surface.isl) >> 2, #endif .SurfaceBaseAddress = { |