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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-10-07 23:02:25 -0700 |
|---|---|---|
| committer | Emil Velikov <emil.l.velikov@gmail.com> | 2016-11-23 13:54:55 +0000 |
| commit | 1ba7f6ce38a6af237bec60a623ad716d5d35bce0 (patch) | |
| tree | 81e5fc8dffad3f1e6fa2855b5208be7f15fa7562 /src/intel | |
| parent | 64d7d70c5b4722f53f6080b35ec516462f1e191b (diff) | |
| download | external_mesa3d-1ba7f6ce38a6af237bec60a623ad716d5d35bce0.zip external_mesa3d-1ba7f6ce38a6af237bec60a623ad716d5d35bce0.tar.gz external_mesa3d-1ba7f6ce38a6af237bec60a623ad716d5d35bce0.tar.bz2 | |
anv/gen8: Stall when needed in Cmd(Set|Reset)Event
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 71397042fea36a2a14b530b75829ad13f969fd00)
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/vulkan/gen8_cmd_buffer.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c index 0548a5e..f1dfe7b 100644 --- a/src/intel/vulkan/gen8_cmd_buffer.c +++ b/src/intel/vulkan/gen8_cmd_buffer.c @@ -513,6 +513,25 @@ genX(cmd_buffer_emit_hz_op)(struct anv_cmd_buffer *cmd_buffer, } } +/* Set of stage bits for which are pipelined, i.e. they get queued by the + * command streamer for later execution. + */ +#define ANV_PIPELINE_STAGE_PIPELINED_BITS \ + (VK_PIPELINE_STAGE_VERTEX_INPUT_BIT | \ + VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | \ + VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT | \ + VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT | \ + VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT | \ + VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | \ + VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | \ + VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT | \ + VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | \ + VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT | \ + VK_PIPELINE_STAGE_TRANSFER_BIT | \ + VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT | \ + VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT | \ + VK_PIPELINE_STAGE_ALL_COMMANDS_BIT) + void genX(CmdSetEvent)( VkCommandBuffer commandBuffer, VkEvent _event, @@ -522,6 +541,11 @@ void genX(CmdSetEvent)( ANV_FROM_HANDLE(anv_event, event, _event); anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + if (stageMask & ANV_PIPELINE_STAGE_PIPELINED_BITS) { + pc.StallAtPixelScoreboard = true; + pc.CommandStreamerStallEnable = true; + } + pc.DestinationAddressType = DAT_PPGTT, pc.PostSyncOperation = WriteImmediateData, pc.Address = (struct anv_address) { @@ -541,6 +565,11 @@ void genX(CmdResetEvent)( ANV_FROM_HANDLE(anv_event, event, _event); anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { + if (stageMask & ANV_PIPELINE_STAGE_PIPELINED_BITS) { + pc.StallAtPixelScoreboard = true; + pc.CommandStreamerStallEnable = true; + } + pc.DestinationAddressType = DAT_PPGTT; pc.PostSyncOperation = WriteImmediateData; pc.Address = (struct anv_address) { |