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| author | Chad Versace <chad.versace@intel.com> | 2016-01-05 11:28:49 -0800 |
|---|---|---|
| committer | Chad Versace <chad.versace@intel.com> | 2016-01-05 11:35:13 -0800 |
| commit | 81357866051fe5049f7327081da257278a3a24a3 (patch) | |
| tree | 36aee2fe5da8e221ef6bc7756ee98abcae56fb03 /src/isl/isl_gen7.c | |
| parent | 33f06842be7cc0ee51fa80e5442d18d02ca0e114 (diff) | |
| download | external_mesa3d-81357866051fe5049f7327081da257278a3a24a3.zip external_mesa3d-81357866051fe5049f7327081da257278a3a24a3.tar.gz external_mesa3d-81357866051fe5049f7327081da257278a3a24a3.tar.bz2 | |
isl: Document gen7_filter_tiling()
Diffstat (limited to 'src/isl/isl_gen7.c')
| -rw-r--r-- | src/isl/isl_gen7.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/isl/isl_gen7.c b/src/isl/isl_gen7.c index 9984f61..4484abb 100644 --- a/src/isl/isl_gen7.c +++ b/src/isl/isl_gen7.c @@ -185,6 +185,17 @@ gen7_format_needs_valign2(const struct isl_device *dev, format == ISL_FORMAT_R32G32B32_FLOAT; } +/** + * @brief Filter out tiling flags that are incompatible with the surface. + * + * The resultant outgoing @a flags is a subset of the incoming @a flags. The + * outgoing flags may be empty (0x0) if the incoming flags were too + * restrictive. + * + * For example, if the surface will be used for a display + * (ISL_SURF_USAGE_DISPLAY_BIT), then this function filters out all tiling + * flags except ISL_TILING_X_BIT and ISL_TILING_LINEAR_BIT. + */ void gen7_filter_tiling(const struct isl_device *dev, const struct isl_surf_init_info *restrict info, |