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| author | Kenneth Graunke <kenneth@whitecape.org> | 2015-11-10 14:35:27 -0800 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2015-12-22 02:12:05 -0800 |
| commit | a5038427c3624e559f954124d77304f9ae9b884c (patch) | |
| tree | f3ed042e5999da82c91696a9f0ea9d6c2b0c82a2 /src/mesa/drivers/dri/i965/Makefile.sources | |
| parent | 54daffef167974989368b4c1f9657d878a9e2411 (diff) | |
| download | external_mesa3d-a5038427c3624e559f954124d77304f9ae9b884c.zip external_mesa3d-a5038427c3624e559f954124d77304f9ae9b884c.tar.gz external_mesa3d-a5038427c3624e559f954124d77304f9ae9b884c.tar.bz2 | |
i965: Add tessellation evaluation shaders
The TES is essentially a post-tessellator VS, which has access to the
entire TCS output patch, and a special gl_TessCoord input. Otherwise,
they're very straightforward.
This patch implements SIMD8 tessellation evaluation shaders for Gen8+.
The tessellator can generate a lot of geometry, so operating in SIMD8
mode (8 vertices per thread) is more efficient than SIMD4x2 mode (only
2 vertices per thread). I have another patch which implements SIMD4x2
mode for older hardware (or via an environment variable override).
We currently handle all inputs via the pull model.
v2: Improve comments (suggested by Jordan Justen).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/Makefile.sources')
| -rw-r--r-- | src/mesa/drivers/dri/i965/Makefile.sources | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources index d147a73..7354aaf 100644 --- a/src/mesa/drivers/dri/i965/Makefile.sources +++ b/src/mesa/drivers/dri/i965/Makefile.sources @@ -151,6 +151,7 @@ i965_FILES = \ brw_state_upload.c \ brw_structs.h \ brw_tcs_surface_state.c \ + brw_tes.c \ brw_tes_surface_state.c \ brw_tex.c \ brw_tex_layout.c \ |