diff options
| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-08-27 21:48:40 -0700 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-09-12 19:42:57 -0700 |
| commit | 2dba5489ae82161ebbf1d6db3e63b27b45c17eae (patch) | |
| tree | 2a593072d40aca7130eecf11d0d2e5d3518c108b /src/mesa/drivers/dri/i965/brw_blorp.c | |
| parent | 7ddb21708c800dfbe3cea2df6aaaf7aed852761b (diff) | |
| download | external_mesa3d-2dba5489ae82161ebbf1d6db3e63b27b45c17eae.zip external_mesa3d-2dba5489ae82161ebbf1d6db3e63b27b45c17eae.tar.gz external_mesa3d-2dba5489ae82161ebbf1d6db3e63b27b45c17eae.tar.bz2 | |
intel/blorp: Take an isl_swizzle instead of a SWIZZLE
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_blorp.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.c | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 712a228..b6fe5d1 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -256,6 +256,25 @@ brw_blorp_to_isl_format(struct brw_context *brw, mesa_format format, } /** + * Convert an swizzle enumeration (i.e. SWIZZLE_X) to one of the Gen7.5+ + * "Shader Channel Select" enumerations (i.e. HSW_SCS_RED). The mappings are + * + * SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_ZERO, SWIZZLE_ONE + * 0 1 2 3 4 5 + * 4 5 6 7 0 1 + * SCS_RED, SCS_GREEN, SCS_BLUE, SCS_ALPHA, SCS_ZERO, SCS_ONE + * + * which is simply adding 4 then modding by 8 (or anding with 7). + * + * We then may need to apply workarounds for textureGather hardware bugs. + */ +static enum isl_channel_select +swizzle_to_scs(GLenum swizzle) +{ + return (enum isl_channel_select)((swizzle + 4) & 7); +} + +/** * Note: if the src (or dst) is a 2D multisample array texture on Gen7+ using * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, src_layer (dst_layer) is * the physical layer holding sample 0. So, for example, if @@ -330,10 +349,17 @@ brw_blorp_blit_miptrees(struct brw_context *brw, blorp_surf_for_miptree(brw, &dst_surf, dst_mt, true, &dst_level, &tmp_surfs[2]); + struct isl_swizzle src_isl_swizzle = { + .r = swizzle_to_scs(GET_SWZ(src_swizzle, 0)), + .g = swizzle_to_scs(GET_SWZ(src_swizzle, 1)), + .b = swizzle_to_scs(GET_SWZ(src_swizzle, 2)), + .a = swizzle_to_scs(GET_SWZ(src_swizzle, 3)), + }; + struct blorp_batch batch; blorp_batch_init(&brw->blorp, &batch, brw); blorp_blit(&batch, &src_surf, src_level, src_layer, - brw_blorp_to_isl_format(brw, src_format, false), src_swizzle, + brw_blorp_to_isl_format(brw, src_format, false), src_isl_swizzle, &dst_surf, dst_level, dst_layer, brw_blorp_to_isl_format(brw, dst_format, true), src_x0, src_y0, src_x1, src_y1, |