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authorEric Anholt <eric@anholt.net>2012-08-07 16:53:24 -0700
committerEric Anholt <eric@anholt.net>2012-10-16 13:13:44 -0700
commit5c8dd6cf7995ae52a5482c1209c218f0b9a7b1c1 (patch)
treec1de740798b7bb731e1531ab5d2bac0193e8df45 /src/mesa/drivers/dri/i965/brw_blorp.h
parentddfa346e4a685269c576714eb0b14fd23d748217 (diff)
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i965: Share the draw x/y offset masking code between main/blorp and all gens.
This code is twisty, and the comment before most of the blocks was actually giving me the opposite impression from its intention: We want to apply as much of our offset as possible through coarse tile-aligned adjustment, since we can do so independently per buffer, and apply the minimum we can through fine-grained drawing offset x/y, since it has to agree between all buffers. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_blorp.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 0ad7c1b..79a3f3a 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -325,10 +325,6 @@ void
gen6_blorp_init(struct brw_context *brw);
void
-gen6_blorp_compute_tile_masks(const brw_blorp_params *params,
- uint32_t *tile_mask_x, uint32_t *tile_mask_y);
-
-void
gen6_blorp_emit_batch_head(struct brw_context *brw,
const brw_blorp_params *params);