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author | Chad Versace <chad.versace@linux.intel.com> | 2013-03-19 17:44:50 -0700 |
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committer | Chad Versace <chad.versace@linux.intel.com> | 2013-04-10 10:55:10 -0700 |
commit | 87f4541bc1007dda1e345c16db94672620bc8fb2 (patch) | |
tree | a3a0b0b9f19306e5278f254e2c0f306501b7c87f /src/mesa/drivers/dri/i965/brw_blorp.h | |
parent | 2a416a9b1b1516200c9c704663022d4b17dca302 (diff) | |
download | external_mesa3d-87f4541bc1007dda1e345c16db94672620bc8fb2.zip external_mesa3d-87f4541bc1007dda1e345c16db94672620bc8fb2.tar.gz external_mesa3d-87f4541bc1007dda1e345c16db94672620bc8fb2.tar.bz2 |
i965/blorp: Add fields brw_blorp_mip_info::level,layer
The new fields define the 2D miptree slice to be used. A following patch
will pass the new fields through to intel_miptree_slice_has_hiz().
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_blorp.h')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index 79a3f3a..1b95818 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.h +++ b/src/mesa/drivers/dri/i965/brw_blorp.h @@ -69,6 +69,17 @@ public: struct intel_mipmap_tree *mt; /** + * The miplevel to use. + */ + uint32_t level; + + /** + * The 2D layer within the miplevel. Combined, level and layer define the + * 2D miptree slice to use. + */ + uint32_t layer; + + /** * Width of the miplevel to be used. For surfaces using * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels. */ |