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| author | Eric Anholt <eric@anholt.net> | 2010-09-21 10:53:34 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-09-21 12:29:57 -0700 |
| commit | 4a0bc4716db7bbcbcd65c0f993704733f47d41f7 (patch) | |
| tree | 4566af2c67fbd171cff87f98b04a64b1a1bdb55b /src/mesa/drivers/dri/i965/brw_cc.c | |
| parent | 23c507f1358833585de330ed313dffafabbbd3cd (diff) | |
| download | external_mesa3d-4a0bc4716db7bbcbcd65c0f993704733f47d41f7.zip external_mesa3d-4a0bc4716db7bbcbcd65c0f993704733f47d41f7.tar.gz external_mesa3d-4a0bc4716db7bbcbcd65c0f993704733f47d41f7.tar.bz2 | |
i965: Also enable CC statistics when doing OQs.
This is required by the spec, so respect that.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_cc.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_cc.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index cfce5d3..8430ee0 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -90,6 +90,7 @@ static void prepare_cc_unit(struct brw_context *brw) */ static void upload_cc_unit(struct brw_context *brw) { + struct intel_context *intel = &brw->intel; GLcontext *ctx = &brw->intel.ctx; struct brw_cc_unit_state cc; void *map; @@ -203,12 +204,12 @@ static void upload_cc_unit(struct brw_context *brw) cc.cc2.depth_write_enable = ctx->Depth.Mask; } + if (intel->stats_wm || (INTEL_DEBUG & DEBUG_STATS)) + cc.cc5.statistics_enable = 1; + /* CACHE_NEW_CC_VP */ cc.cc4.cc_viewport_state_offset = brw->cc.vp_bo->offset >> 5; /* reloc */ - if (INTEL_DEBUG & DEBUG_STATS) - cc.cc5.statistics_enable = 1; - map = brw_state_batch(brw, sizeof(cc), 64, &brw->cc.state_bo, &brw->cc.state_offset); memcpy(map, &cc, sizeof(cc)); |