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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-05-12 14:07:51 -0700 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-05-14 14:18:21 -0700 |
| commit | 09e041d61d367ff3a9e8492521606090050255d4 (patch) | |
| tree | 24b2e926840a079249cb123617ef84b12c12dcd9 /src/mesa/drivers/dri/i965/brw_clear.c | |
| parent | 1cfb4bc890b8d6f898e4d43823e7ffe047296251 (diff) | |
| download | external_mesa3d-09e041d61d367ff3a9e8492521606090050255d4.zip external_mesa3d-09e041d61d367ff3a9e8492521606090050255d4.tar.gz external_mesa3d-09e041d61d367ff3a9e8492521606090050255d4.tar.bz2 | |
i965: Use blorp for all clears
We used to use a meta path on gen8 but we haven't since c7cf17ae758. We
might as well delete the meta path since blorp works on all gens.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_clear.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clear.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index d57b677..1dfff09 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -248,14 +248,6 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) } } - /* Clear color buffers with fast clear or at least rep16 writes. */ - if (brw->gen >= 6 && (mask & BUFFER_BITS_COLOR)) { - if (brw_meta_fast_clear(brw, fb, mask, partial_clear)) { - debug_mask("blorp color", mask & BUFFER_BITS_COLOR); - mask &= ~BUFFER_BITS_COLOR; - } - } - GLbitfield tri_mask = mask & (BUFFER_BITS_COLOR | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH); |