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author | Eric Anholt <eric@anholt.net> | 2010-05-18 15:27:10 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2010-05-20 13:42:27 -0700 |
commit | f716063ad133ec142d9846d55e569db1295650a6 (patch) | |
tree | bbe0cd18ed6d77ac0649aede3596409eda42bdf8 /src/mesa/drivers/dri/i965/brw_clip.h | |
parent | f2b80e5679741c39b79102e7ee5057d1af9bce82 (diff) | |
download | external_mesa3d-f716063ad133ec142d9846d55e569db1295650a6.zip external_mesa3d-f716063ad133ec142d9846d55e569db1295650a6.tar.gz external_mesa3d-f716063ad133ec142d9846d55e569db1295650a6.tar.bz2 |
i965: remove disabled code for cycling through MRF registers in clipping.
The idea would be that you could have multiple send messages going on
if nothing depended on the previous message's results and you used a
different send message. The problem is that the later send requires
the VUE handle returned by the first send's allocate anyway.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_clip.h')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip.h b/src/mesa/drivers/dri/i965/brw_clip.h index d71bac7..68222c6 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.h +++ b/src/mesa/drivers/dri/i965/brw_clip.h @@ -114,8 +114,6 @@ struct brw_clip_compile { GLboolean need_direction; - GLuint last_mrf; - GLuint header_position_offset; GLuint offset[VERT_ATTRIB_MAX]; }; |