summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/brw_clip_line.c
diff options
context:
space:
mode:
authorEric Anholt <eric@anholt.net>2011-12-06 12:13:32 -0800
committerEric Anholt <eric@anholt.net>2011-12-21 14:31:33 -0800
commit32118cfe37495738ed5931c6b1a71b8ee2ad189c (patch)
tree077737af71aee0979154c763375f38254799b4c2 /src/mesa/drivers/dri/i965/brw_clip_line.c
parent9f8814752f306cb9a26d283f0b7cf876639e10f7 (diff)
downloadexternal_mesa3d-32118cfe37495738ed5931c6b1a71b8ee2ad189c.zip
external_mesa3d-32118cfe37495738ed5931c6b1a71b8ee2ad189c.tar.gz
external_mesa3d-32118cfe37495738ed5931c6b1a71b8ee2ad189c.tar.bz2
i965: Don't make consumers of brw_DO()/brw_WHILE() track loop start.
This is a similar cleanup to what we did for brw_IF(), brw_ELSE(), brw_ENDIF() handling. Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_clip_line.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_line.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c
index 614849a..6cf2bd2 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_line.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
@@ -132,7 +132,6 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
struct brw_indirect newvtx0 = brw_indirect(2, 0);
struct brw_indirect newvtx1 = brw_indirect(3, 0);
struct brw_indirect plane_ptr = brw_indirect(4, 0);
- struct brw_instruction *plane_loop;
struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
GLuint hpos_offset = brw_vert_result_to_offset(&c->vue_map,
VERT_RESULT_HPOS);
@@ -160,7 +159,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
- plane_loop = brw_DO(p, BRW_EXECUTE_1);
+ brw_DO(p, BRW_EXECUTE_1);
{
/* if (planemask & 1)
*/
@@ -245,7 +244,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(1));
}
- brw_WHILE(p, plane_loop);
+ brw_WHILE(p);
brw_ADD(p, c->reg.t, c->reg.t0, c->reg.t1);
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0));