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| author | Xiang, Haihao <haihao.xiang@intel.com> | 2008-07-08 14:14:04 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2008-07-08 14:14:04 +0800 |
| commit | 92c075eeb7c330ea420400d1c2bae57356b19f03 (patch) | |
| tree | d6a441c63834fbbe29361dbfde372263004f5216 /src/mesa/drivers/dri/i965/brw_clip_line.c | |
| parent | a36bf890e8be3473f6a98f5ba4369e3acc0463ad (diff) | |
| download | external_mesa3d-92c075eeb7c330ea420400d1c2bae57356b19f03.zip external_mesa3d-92c075eeb7c330ea420400d1c2bae57356b19f03.tar.gz external_mesa3d-92c075eeb7c330ea420400d1c2bae57356b19f03.tar.bz2 | |
i965: official name for GM45 chipset
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_clip_line.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip_line.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c index 7d51cdd..0930e6a 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_line.c +++ b/src/mesa/drivers/dri/i965/brw_clip_line.c @@ -148,7 +148,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c ) brw_clip_init_clipmask(c); /* -ve rhw workaround */ - if (!BRW_IS_IGD(p->brw)) { + if (!(BRW_IS_GM45(p->brw) || BRW_IS_G4X(p->brw))) { brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ); brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<20)); |