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author | Eric Anholt <eric@anholt.net> | 2010-07-19 16:44:38 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2010-07-19 19:29:03 -0700 |
commit | 09788ce10e354b3af6139c04a13b38df18632b13 (patch) | |
tree | 4a245da1d154cca74ec22c82c66b04abc07b132b /src/mesa/drivers/dri/i965/brw_clip_tri.c | |
parent | e29cff62734b6aaf0b05dba0b3ed98fe78842a42 (diff) | |
download | external_mesa3d-09788ce10e354b3af6139c04a13b38df18632b13.zip external_mesa3d-09788ce10e354b3af6139c04a13b38df18632b13.tar.gz external_mesa3d-09788ce10e354b3af6139c04a13b38df18632b13.tar.bz2 |
i965: Reduce repeated calculation of the attribute-offset-in-VUE.
This cleans up some chipset dependency sprinkled around, and fixes a
potential overflow of the attribute offset array for many vertex
results.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_clip_tri.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip_tri.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c index fd425b3..cb58d1d 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_tri.c +++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c @@ -76,10 +76,7 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c, if (c->nr_attrs & 1) { for (j = 0; j < 3; j++) { - GLuint delta = c->nr_attrs*16 + 32; - - if (intel->gen == 5) - delta = c->nr_attrs * 16 + 32 * 3; + GLuint delta = c->offset[c->idx_to_attr[c->nr_attrs - 1]] + ATTR_SIZE; brw_MOV(&c->func, byte_offset(c->reg.vertex[j], delta), brw_imm_f(0)); } |