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author | Paul Berry <stereotype441@gmail.com> | 2013-02-23 07:22:01 -0800 |
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committer | Paul Berry <stereotype441@gmail.com> | 2013-03-15 09:24:54 -0700 |
commit | 36b252e94724b2512ea941eff2b3a3abeb80be79 (patch) | |
tree | 3f904073b430eed86b128b73e6142fbc4ad458b2 /src/mesa/drivers/dri/i965/brw_clip_unfilled.c | |
parent | 9e729a79b0d5c7f2bf42262d57f6e0994c625dbe (diff) | |
download | external_mesa3d-36b252e94724b2512ea941eff2b3a3abeb80be79.zip external_mesa3d-36b252e94724b2512ea941eff2b3a3abeb80be79.tar.gz external_mesa3d-36b252e94724b2512ea941eff2b3a3abeb80be79.tar.bz2 |
Replace gl_vert_result enum with gl_varying_slot.
This patch makes the following search-and-replace changes:
gl_vert_result -> gl_varying_slot
VERT_RESULT_* -> VARYING_SLOT_*
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Brian Paul <brianp@vmware.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_clip_unfilled.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip_unfilled.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c index 03c7d42..e4f4835 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c +++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c @@ -53,7 +53,7 @@ static void compute_tri_direction( struct brw_clip_compile *c ) struct brw_reg e = c->reg.tmp0; struct brw_reg f = c->reg.tmp1; GLuint hpos_offset = brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_HPOS); + VARYING_SLOT_POS); struct brw_reg v0 = byte_offset(c->reg.vertex[0], hpos_offset); struct brw_reg v1 = byte_offset(c->reg.vertex[1], hpos_offset); struct brw_reg v2 = byte_offset(c->reg.vertex[2], hpos_offset); @@ -130,10 +130,10 @@ static void copy_bfc( struct brw_clip_compile *c ) /* Do we have any colors to copy? */ - if (!(brw_clip_have_vert_result(c, VERT_RESULT_COL0) && - brw_clip_have_vert_result(c, VERT_RESULT_BFC0)) && - !(brw_clip_have_vert_result(c, VERT_RESULT_COL1) && - brw_clip_have_vert_result(c, VERT_RESULT_BFC1))) + if (!(brw_clip_have_vert_result(c, VARYING_SLOT_COL0) && + brw_clip_have_vert_result(c, VARYING_SLOT_BFC0)) && + !(brw_clip_have_vert_result(c, VARYING_SLOT_COL1) && + brw_clip_have_vert_result(c, VARYING_SLOT_BFC1))) return; /* In some wierd degnerate cases we can end up testing the @@ -156,25 +156,25 @@ static void copy_bfc( struct brw_clip_compile *c ) GLuint i; for (i = 0; i < 3; i++) { - if (brw_clip_have_vert_result(c, VERT_RESULT_COL0) && - brw_clip_have_vert_result(c, VERT_RESULT_BFC0)) + if (brw_clip_have_vert_result(c, VARYING_SLOT_COL0) && + brw_clip_have_vert_result(c, VARYING_SLOT_BFC0)) brw_MOV(p, byte_offset(c->reg.vertex[i], brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_COL0)), + VARYING_SLOT_COL0)), byte_offset(c->reg.vertex[i], brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_BFC0))); + VARYING_SLOT_BFC0))); - if (brw_clip_have_vert_result(c, VERT_RESULT_COL1) && - brw_clip_have_vert_result(c, VERT_RESULT_BFC1)) + if (brw_clip_have_vert_result(c, VARYING_SLOT_COL1) && + brw_clip_have_vert_result(c, VARYING_SLOT_BFC1)) brw_MOV(p, byte_offset(c->reg.vertex[i], brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_COL1)), + VARYING_SLOT_COL1)), byte_offset(c->reg.vertex[i], brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_BFC1))); + VARYING_SLOT_BFC1))); } } brw_ENDIF(p); @@ -235,7 +235,7 @@ static void merge_edgeflags( struct brw_clip_compile *c ) brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8)); brw_MOV(p, byte_offset(c->reg.vertex[0], brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_EDGE)), + VARYING_SLOT_EDGE)), brw_imm_f(0)); brw_set_predicate_control(p, BRW_PREDICATE_NONE); @@ -243,7 +243,7 @@ static void merge_edgeflags( struct brw_clip_compile *c ) brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9)); brw_MOV(p, byte_offset(c->reg.vertex[2], brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_EDGE)), + VARYING_SLOT_EDGE)), brw_imm_f(0)); brw_set_predicate_control(p, BRW_PREDICATE_NONE); } @@ -257,7 +257,7 @@ static void apply_one_offset( struct brw_clip_compile *c, { struct brw_compile *p = &c->func; GLuint ndc_offset = brw_vert_result_to_offset(&c->vue_map, - BRW_VERT_RESULT_NDC); + BRW_VARYING_SLOT_NDC); struct brw_reg z = deref_1f(vert, ndc_offset + 2 * type_sz(BRW_REGISTER_TYPE_F)); @@ -316,7 +316,7 @@ static void emit_lines(struct brw_clip_compile *c, brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, deref_1f(v0, brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_EDGE)), + VARYING_SLOT_EDGE)), brw_imm_f(0)); brw_IF(p, BRW_EXECUTE_1); { @@ -358,7 +358,7 @@ static void emit_points(struct brw_clip_compile *c, brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, deref_1f(v0, brw_vert_result_to_offset(&c->vue_map, - VERT_RESULT_EDGE)), + VARYING_SLOT_EDGE)), brw_imm_f(0)); brw_IF(p, BRW_EXECUTE_1); { @@ -473,7 +473,7 @@ void brw_emit_unfilled_clip( struct brw_clip_compile *c ) brw_clip_tri_init_vertices(c); brw_clip_init_ff_sync(c); - assert(brw_clip_have_vert_result(c, VERT_RESULT_EDGE)); + assert(brw_clip_have_vert_result(c, VARYING_SLOT_EDGE)); if (c->key.fill_ccw == CLIP_CULL && c->key.fill_cw == CLIP_CULL) { |