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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2015-11-11 10:04:43 -0800 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2015-11-23 11:02:15 -0800 |
| commit | ce767bbdfff7c2a7829b652c111a11eb9ddba026 (patch) | |
| tree | de930008c2232086b3915d44088a89eae3ea87eb /src/mesa/drivers/dri/i965/brw_compiler.h | |
| parent | 9cf108193b61c342c94c4cd980c4b403638e1051 (diff) | |
| download | external_mesa3d-ce767bbdfff7c2a7829b652c111a11eb9ddba026.zip external_mesa3d-ce767bbdfff7c2a7829b652c111a11eb9ddba026.tar.gz external_mesa3d-ce767bbdfff7c2a7829b652c111a11eb9ddba026.tar.bz2 | |
i965: Move postprocess_nir to codegen time
This allows us to insert NIR passes between initial NIR compilation and
optimization (link time) and actual backend code-gen. In particular, it
will allow us to do shader variants in NIR and share some of that shader
variant code between backends.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_compiler.h')
0 files changed, 0 insertions, 0 deletions