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authorChris Wilson <chris@chris-wilson.co.uk>2014-09-19 10:10:13 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2015-03-18 09:33:33 +0000
commit64788b2e8dc2ddedc2712ed02b7e9096638b7bae (patch)
tree39e5e95407397e643ea07ee0e9ae3fd90c4fe6d8 /src/mesa/drivers/dri/i965/brw_context.c
parent8b9bd19021c0efef33d66ae24f8871b826d66e8a (diff)
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i965: Throttle to the previous frame
In order to facilitate the concurrency offered by triple buffering and to offset the latency induced by swapping via an external process, which may incur extra rendering itself, only throttle to the previous frame and not the last. The second issue that mostly affects swap benchmarks, but also can incur jitter in the throttling, is that the throttle bo is closer to the next SwapBuffers rather than immediately after the previous SwapBuffers. Throttling to the previous frame doubles the maximum possible latency at the benefit of improving throughput and reducing jitter. v2: Rename "first_post_swapbuffer" batches array to a plain throttle_batch[] as the pluralisation was contorting the name and not making it clear as to whether it was the first batch or first_post_swap batch. Not least of which was that not all throttle points are SwapBuffers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Kenneth Graunke <kenneth@whitecape.org> Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Kristian Høgsberg <krh@bitplanet.net> Cc: Chad Versace <chad.versace@linux.intel.com> Cc: Ian Romanick <idr@freedesktop.org> Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c19
1 files changed, 12 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 5120372..8257fb6 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -935,8 +935,10 @@ intelDestroyContext(__DRIcontext * driContextPriv)
intel_batchbuffer_free(brw);
- drm_intel_bo_unreference(brw->first_post_swapbuffers_batch);
- brw->first_post_swapbuffers_batch = NULL;
+ drm_intel_bo_unreference(brw->throttle_batch[1]);
+ drm_intel_bo_unreference(brw->throttle_batch[0]);
+ brw->throttle_batch[1] = NULL;
+ brw->throttle_batch[0] = NULL;
driDestroyOptionCache(&brw->optionCache);
@@ -1245,11 +1247,14 @@ intel_prepare_render(struct brw_context *brw)
* the swap, and getting our hands on that doesn't seem worth it,
* so we just us the first batch we emitted after the last swap.
*/
- if (brw->need_swap_throttle && brw->first_post_swapbuffers_batch) {
- if (!brw->disable_throttling)
- drm_intel_bo_wait_rendering(brw->first_post_swapbuffers_batch);
- drm_intel_bo_unreference(brw->first_post_swapbuffers_batch);
- brw->first_post_swapbuffers_batch = NULL;
+ if (brw->need_swap_throttle && brw->throttle_batch[0]) {
+ if (brw->throttle_batch[1]) {
+ if (!brw->disable_throttling)
+ drm_intel_bo_wait_rendering(brw->throttle_batch[1]);
+ drm_intel_bo_unreference(brw->throttle_batch[1]);
+ }
+ brw->throttle_batch[1] = brw->throttle_batch[0];
+ brw->throttle_batch[0] = NULL;
brw->need_swap_throttle = false;
/* Throttling here is more precise than the throttle ioctl, so skip it */
brw->need_flush_throttle = false;