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| author | Jordan Justen <jordan.l.justen@intel.com> | 2016-02-13 14:25:33 -0800 |
|---|---|---|
| committer | Jordan Justen <jordan.l.justen@intel.com> | 2016-02-16 09:25:20 -0800 |
| commit | 8514c75a26ec2a83784ea9063ed5e6587184832c (patch) | |
| tree | 5676465c274bdc9ff44e1da7cbdb7c5712454c3b /src/mesa/drivers/dri/i965/brw_context.c | |
| parent | f90801cd400ec251ef3ad9a7c2ebc6feadbc7860 (diff) | |
| download | external_mesa3d-8514c75a26ec2a83784ea9063ed5e6587184832c.zip external_mesa3d-8514c75a26ec2a83784ea9063ed5e6587184832c.tar.gz external_mesa3d-8514c75a26ec2a83784ea9063ed5e6587184832c.tar.bz2 | |
i965: Set compute shader shared memory max to 64k
See Ivy Bridge PRM, Volume 2, Part 2, 1.8.4 INTERFACE_DESCRIPTOR_DATA:
DWORD 5, bits 20:16: "This field indicates how much shared local
memory the thread group requires. The amount is specified in 4k
blocks, but only powers of 2 are allowed: 0, 4k, 8k, 16k, 32k and 64k
per half-slice."
For Haswell, see Volume 2d, INTERFACE_DESCRIPTOR_DATA:
DWORD 5, bits 20:16: With text identical to the Ivy Bridge PRM.
For Broadwell, see Volume 2d, INTERFACE_DESCRIPTOR_DATA:
DWORD 6, bits 20:16: With text identical to the Ivy Bridge PRM.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 8144a0e..31b6b2a 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -724,7 +724,7 @@ brw_initialize_cs_context_constants(struct brw_context *brw, unsigned max_thread ctx->Const.MaxComputeWorkGroupSize[1] = max_invocations; ctx->Const.MaxComputeWorkGroupSize[2] = max_invocations; ctx->Const.MaxComputeWorkGroupInvocations = max_invocations; - ctx->Const.MaxComputeSharedMemorySize = 32768; + ctx->Const.MaxComputeSharedMemorySize = 64 * 1024; } /** |