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author | Gurchetan Singh <gurchetansingh@chromium.org> | 2016-05-11 13:32:09 -0700 |
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committer | Kenneth Graunke <kenneth@whitecape.org> | 2016-06-07 15:42:21 -0700 |
commit | d9546b0c5d1a5136a92276cdd7c14883f0c62737 (patch) | |
tree | 70aea5ac5a1d7d7ad43fe91b7d2ac604c8a8ae24 /src/mesa/drivers/dri/i965/brw_context.c | |
parent | f39439d1666481bd1316e865eb3507a2a397f346 (diff) | |
download | external_mesa3d-d9546b0c5d1a5136a92276cdd7c14883f0c62737.zip external_mesa3d-d9546b0c5d1a5136a92276cdd7c14883f0c62737.tar.gz external_mesa3d-d9546b0c5d1a5136a92276cdd7c14883f0c62737.tar.bz2 |
i965: Integrate precise trig into configuration infrastructure
With this change, to enable precise SIN and COS instructions
on Intel hardware, one can put
<option name="precise_trig" value="true"/>
in the proper drirc file.
V2: Make option name more generic
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Stephane Marchesin <stephane.marchesin@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_context.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 97dc226..7bbc128 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -803,6 +803,9 @@ brw_process_driconf_options(struct brw_context *brw) brw->precompile = driQueryOptionb(&brw->optionCache, "shader_precompile"); + brw->intelScreen->compiler->precise_trig = + driQueryOptionb(&brw->optionCache, "precise_trig"); + ctx->Const.ForceGLSLExtensionsWarn = driQueryOptionb(options, "force_glsl_extensions_warn"); |