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| author | Matt Turner <mattst88@gmail.com> | 2014-10-23 23:22:09 -0700 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2014-12-05 09:49:42 -0800 |
| commit | 0d3cc01b0b092271938ce2cf2b77d27dc385e4d8 (patch) | |
| tree | 14ce75ee62e6ee61354e164d1e506b18d4b03569 /src/mesa/drivers/dri/i965/brw_defines.h | |
| parent | be80f69ecdb5544509d762ce5c832c4ad3abbe9b (diff) | |
| download | external_mesa3d-0d3cc01b0b092271938ce2cf2b77d27dc385e4d8.zip external_mesa3d-0d3cc01b0b092271938ce2cf2b77d27dc385e4d8.tar.gz external_mesa3d-0d3cc01b0b092271938ce2cf2b77d27dc385e4d8.tar.bz2 | |
i965/vec4: Allow CSE on uniform-vec4 expansion MOVs.
Three source instructions cannot directly source a packed vec4 (<0,4,1>
regioning) like vec4 uniforms, so we emit a MOV that expands the vec4 to
both halves of a register.
If these uniform values are used by multiple three-source instructions,
we'll emit multiple expansion moves, which we cannot combine in CSE
(because CSE emits moves itself).
So emit a virtual instruction that we can CSE.
Sometimes we demote a uniform to to a pull constant after emitting an
expansion move for it. In that case, recognize in opt_algebraic that if
the .file of the new instruction is GRF then it's just a real move that
we can copy propagate and such.
total instructions in shared programs: 5822418 -> 5812335 (-0.17%)
instructions in affected programs: 351841 -> 341758 (-2.87%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_defines.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 2acd0f8..d4211496 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -909,6 +909,7 @@ enum opcode { SHADER_OPCODE_GEN7_SCRATCH_READ, VEC4_OPCODE_PACK_BYTES, + VEC4_OPCODE_UNPACK_UNIFORM, FS_OPCODE_DDX_COARSE, FS_OPCODE_DDX_FINE, |