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| author | Iago Toral Quiroga <itoral@igalia.com> | 2014-07-17 08:54:03 +0200 |
|---|---|---|
| committer | Iago Toral Quiroga <itoral@igalia.com> | 2014-09-19 15:01:15 +0200 |
| commit | f373b7ed820024080838742f419bbca5fcbde2bf (patch) | |
| tree | c656783589b26caf19e667b44614903792acdd4a /src/mesa/drivers/dri/i965/brw_defines.h | |
| parent | 7ccd47d644962cbb6424a2e75de3b5317cbda62b (diff) | |
| download | external_mesa3d-f373b7ed820024080838742f419bbca5fcbde2bf.zip external_mesa3d-f373b7ed820024080838742f419bbca5fcbde2bf.tar.gz external_mesa3d-f373b7ed820024080838742f419bbca5fcbde2bf.tar.bz2 | |
i965/gen6/gs: Implement GS_OPCODE_SET_DWORD_2.
We had GS_OPCODE_SET_DWORD_2_IMMED but this required its source argument to be
an immediate. In gen6 we need to set dword 2 of the URB write message header
from values stored in separate register, so we need something more flexible.
This change replaces GS_OPCODE_SET_DWORD_2_IMMED with GS_OPCODE_SET_DWORD_2.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_defines.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 72a21e8..1e5a12b 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -984,11 +984,9 @@ enum opcode { GS_OPCODE_SET_VERTEX_COUNT, /** - * Set DWORD 2 of dst to the immediate value in src. Used by geometry - * shaders to initialize DWORD 2 of R0, which needs to be 0 in order for - * scratch reads and writes to operate correctly. + * Set DWORD 2 of dst to the value in src. */ - GS_OPCODE_SET_DWORD_2_IMMED, + GS_OPCODE_SET_DWORD_2, /** * Prepare the dst register for storage in the "Channel Mask" fields of a |