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author | Matt Turner <mattst88@gmail.com> | 2016-04-29 16:34:10 -0700 |
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committer | Matt Turner <mattst88@gmail.com> | 2016-05-03 22:33:42 -0700 |
commit | 667408b889e2bf5f103340c2deeb04c4d99cb75b (patch) | |
tree | 8aab28453633878c7eb68ee135a2855b5176a039 /src/mesa/drivers/dri/i965/brw_disasm.c | |
parent | d01596613b6b7831a3c6a596108a83340f8bf657 (diff) | |
download | external_mesa3d-667408b889e2bf5f103340c2deeb04c4d99cb75b.zip external_mesa3d-667408b889e2bf5f103340c2deeb04c4d99cb75b.tar.gz external_mesa3d-667408b889e2bf5f103340c2deeb04c4d99cb75b.tar.bz2 |
i965: Merge inst_info and opcode_desc tables.
I merged opcode_desc into inst_info (instead of the other way around)
because inst_info was sorted by opcode number.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_disasm.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_disasm.c | 74 |
1 files changed, 0 insertions, 74 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c index 9806c10..1778419 100644 --- a/src/mesa/drivers/dri/i965/brw_disasm.c +++ b/src/mesa/drivers/dri/i965/brw_disasm.c @@ -30,80 +30,6 @@ #include "brw_inst.h" #include "brw_eu.h" -const struct opcode_desc opcode_descs[128] = { - [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_MOVI] = { .name = "movi", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_F32TO16] = { .name = "f32to16", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_F16TO32] = { .name = "f16to32", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_BFREV] = { .name = "bfrev", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_FBH] = { .name = "fbh", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_FBL] = { .name = "fbl", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_CBIT] = { .name = "cbit", .nsrc = 1, .ndst = 1 }, - - [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_MAD] = { .name = "mad", .nsrc = 3, .ndst = 1 }, - [BRW_OPCODE_LRP] = { .name = "lrp", .nsrc = 3, .ndst = 1 }, - [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 }, - - [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_CSEL] = { .name = "csel", .nsrc = 3, .ndst = 1 }, - [BRW_OPCODE_BFE] = { .name = "bfe", .nsrc = 3, .ndst = 1 }, - [BRW_OPCODE_BFI1] = { .name = "bfi1", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_BFI2] = { .name = "bfi2", .nsrc = 3, .ndst = 1 }, - [BRW_OPCODE_ADDC] = { .name = "addc", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SUBB] = { .name = "subb", .nsrc = 2, .ndst = 1 }, - - [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 }, - [BRW_OPCODE_SENDS] = { .name = "sends", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_SENDSC] = { .name = "sendsc", .nsrc = 2, .ndst = 1 }, - [BRW_OPCODE_ILLEGAL] = { .name = "illegal", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_NENOP] = { .name = "nenop", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_IF] = { .name = "if", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 0, .ndst = 0 }, - // [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 }, - // [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 }, - // [BRW_OPCODE_MREST] = { .name = "mrest", .nsrc = 1, .ndst = 1 }, - // [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 }, - [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 }, - [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 }, - [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 0, .ndst = 0 }, -}; - static bool has_jip(const struct brw_device_info *devinfo, enum opcode opcode) { |