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| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-08-20 14:37:19 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-08-20 16:17:39 -0700 |
| commit | 93ba0055c325007656c14ba38302e21be3dc599f (patch) | |
| tree | 31fba7f6e423a3cbeb315c31e54a47c86488817d /src/mesa/drivers/dri/i965/brw_eu.c | |
| parent | ffb5095d56c0f58a35e12d40bb4ffc869e4071bd (diff) | |
| download | external_mesa3d-93ba0055c325007656c14ba38302e21be3dc599f.zip external_mesa3d-93ba0055c325007656c14ba38302e21be3dc599f.tar.gz external_mesa3d-93ba0055c325007656c14ba38302e21be3dc599f.tar.bz2 | |
i965: Add AccWrCtl support on Sandybridge.
Whenever the accumulator results are needed, this bit must be set.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c index 4e7c122..2ff39e8 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.c +++ b/src/mesa/drivers/dri/i965/brw_eu.c @@ -85,6 +85,12 @@ void brw_set_saturate( struct brw_compile *p, GLuint value ) p->current->header.saturate = value; } +void brw_set_acc_write_control(struct brw_compile *p, GLuint value) +{ + if (p->brw->intel.gen >= 6) + p->current->header.acc_wr_control = value; +} + void brw_push_insn_state( struct brw_compile *p ) { assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]); |