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authorFrancisco Jerez <currojerez@riseup.net>2015-04-23 14:21:31 +0300
committerFrancisco Jerez <currojerez@riseup.net>2015-05-04 15:05:20 +0300
commit2f1c16df3e997771bcedb60ae7f16a21c4c60144 (patch)
treea8aeba71c471b089e7aaabe5704da745d5260980 /src/mesa/drivers/dri/i965/brw_eu.h
parent4348046a2f08d9795a158b96f8579f13f5e693e6 (diff)
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i965: Fix the untyped surface opcodes to deal with indirect surface access.
Change brw_untyped_atomic() and brw_untyped_surface_read() to take the surface index as a register instead of a constant and to use brw_send_indirect_message() to emit the indirect variant of send with a dynamically calculated message descriptor. This will be required to support variable indexing of image arrays for ARB_shader_image_load_store. Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_eu.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index b8c63a3..1d0e563 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -401,18 +401,18 @@ void brw_CMP(struct brw_codegen *p,
void
brw_untyped_atomic(struct brw_codegen *p,
- struct brw_reg dest,
+ struct brw_reg dst,
struct brw_reg payload,
+ struct brw_reg surface,
unsigned atomic_op,
- unsigned bind_table_index,
unsigned msg_length,
bool response_expected);
void
brw_untyped_surface_read(struct brw_codegen *p,
- struct brw_reg dest,
- struct brw_reg mrf,
- unsigned bind_table_index,
+ struct brw_reg dst,
+ struct brw_reg payload,
+ struct brw_reg surface,
unsigned msg_length,
unsigned num_channels);