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| author | Francisco Jerez <currojerez@riseup.net> | 2016-05-17 23:18:38 -0700 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2016-05-27 23:19:21 -0700 |
| commit | d8a3294ac21741c3a78eef72b832902e15fbd948 (patch) | |
| tree | 3db7dc5409867194d29a0dc864573e67c9569f8c /src/mesa/drivers/dri/i965/brw_fs_cse.cpp | |
| parent | 0bc5ad8d1997fe33dd43bb476c67163039f065ff (diff) | |
| download | external_mesa3d-d8a3294ac21741c3a78eef72b832902e15fbd948.zip external_mesa3d-d8a3294ac21741c3a78eef72b832902e15fbd948.tar.gz external_mesa3d-d8a3294ac21741c3a78eef72b832902e15fbd948.tar.bz2 | |
i965/fs: Hide varying pull constant load message setup behind logical opcode.
This will allow the SIMD lowering pass to split 32-wide varying pull
constant loads (not natively supported by the hardware) into 16-wide
instructions.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_cse.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp index b17a082..99121c5 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp @@ -72,8 +72,8 @@ is_expression(const fs_visitor *v, const fs_inst *const inst) case BRW_OPCODE_MAD: case BRW_OPCODE_LRP: case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD: + case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL: case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7: - case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD: case FS_OPCODE_CINTERP: case FS_OPCODE_LINTERP: case SHADER_OPCODE_FIND_LIVE_CHANNEL: |