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| author | Francisco Jerez <currojerez@riseup.net> | 2016-05-18 18:41:28 -0700 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2016-05-27 23:19:22 -0700 |
| commit | 117a9a0a6431a6c35aa1cf5fc5cb96d948045ce6 (patch) | |
| tree | b877ff40338492566a612fe1ac84f0793b81bd4e /src/mesa/drivers/dri/i965/brw_fs_generator.cpp | |
| parent | 3a541d0c0b821ee99761b8a251693862b33da509 (diff) | |
| download | external_mesa3d-117a9a0a6431a6c35aa1cf5fc5cb96d948045ce6.zip external_mesa3d-117a9a0a6431a6c35aa1cf5fc5cb96d948045ce6.tar.gz external_mesa3d-117a9a0a6431a6c35aa1cf5fc5cb96d948045ce6.tar.bz2 | |
i965/fs: Set default access mode to Align1 for all instructions in the generator.
Currently the generator code for most opcodes honours the default
access mode (which should typically be Align1 in the scalar back-end),
but generate_code() doesn't set it explicitly which means that the
access mode from a previous instruction could leak into the following
ones if you did something special and weren't careful enough to save
and restore the previous access mode.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_generator.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index 9d1589c..a3cb4c0 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -1697,6 +1697,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width) } dst = brw_reg_from_fs_reg(p, inst, &inst->dst, devinfo->gen); + brw_set_default_access_mode(p, BRW_ALIGN_1); brw_set_default_predicate_control(p, inst->predicate); brw_set_default_predicate_inverse(p, inst->predicate_inverse); brw_set_default_flag_reg(p, 0, inst->flag_subreg); |