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| author | Matt Turner <mattst88@gmail.com> | 2015-04-02 16:57:10 -0700 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2015-04-21 09:24:48 -0700 |
| commit | 3b4abdae041802183fa7d3792a21bf9ca10df96e (patch) | |
| tree | 464ac90c4b2a67f378f3693b547380c7478e5079 /src/mesa/drivers/dri/i965/brw_fs_generator.cpp | |
| parent | 958b4965a23f69085dc04df165d6fccc2707d60e (diff) | |
| download | external_mesa3d-3b4abdae041802183fa7d3792a21bf9ca10df96e.zip external_mesa3d-3b4abdae041802183fa7d3792a21bf9ca10df96e.tar.gz external_mesa3d-3b4abdae041802183fa7d3792a21bf9ca10df96e.tar.bz2 | |
i965/fs: Ensure delta_x/y are even-aligned registers on Gen6.
The BSpec says this applies to Gen6 as well.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_generator.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index b06a947..a732a89 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -428,7 +428,7 @@ fs_generator::generate_linterp(fs_inst *inst, if (brw->has_pln && delta_y.nr == delta_x.nr + 1 && - (brw->gen >= 6 || (delta_x.nr & 1) == 0)) { + (brw->gen >= 7 || (delta_x.nr & 1) == 0)) { brw_PLN(p, dst, interp, delta_x); } else { brw_LINE(p, brw_null_reg(), interp, delta_x); |