diff options
| author | Francisco Jerez <currojerez@riseup.net> | 2016-05-17 20:02:29 -0700 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2016-05-27 23:19:23 -0700 |
| commit | 982c48dc34170c9de5e56a6d525ac1f8b7e2a07c (patch) | |
| tree | b639859a64185621c57ae5085a9b0753762c6f40 /src/mesa/drivers/dri/i965/brw_fs_generator.cpp | |
| parent | 95272f5c7e6914fe8a85a4e37e07f1e8e3634446 (diff) | |
| download | external_mesa3d-982c48dc34170c9de5e56a6d525ac1f8b7e2a07c.zip external_mesa3d-982c48dc34170c9de5e56a6d525ac1f8b7e2a07c.tar.gz external_mesa3d-982c48dc34170c9de5e56a6d525ac1f8b7e2a07c.tar.bz2 | |
i965/fs: Remove manual unrolling of BFI instructions from the generator.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_generator.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 36 |
1 files changed, 2 insertions, 34 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index ad32b6c..608898a 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -1841,44 +1841,12 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width) case BRW_OPCODE_BFI1: assert(devinfo->gen >= 7); - /* The Haswell WaForceSIMD8ForBFIInstruction workaround says that we - * should - * - * "Force BFI instructions to be executed always in SIMD8." - */ - if (dispatch_width == 16 && devinfo->is_haswell) { - brw_set_default_exec_size(p, BRW_EXECUTE_8); - brw_set_default_compression_control(p, BRW_COMPRESSION_NONE); - brw_BFI1(p, firsthalf(dst), firsthalf(src[0]), firsthalf(src[1])); - brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF); - brw_BFI1(p, sechalf(dst), sechalf(src[0]), sechalf(src[1])); - brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED); - } else { - brw_BFI1(p, dst, src[0], src[1]); - } + brw_BFI1(p, dst, src[0], src[1]); break; case BRW_OPCODE_BFI2: assert(devinfo->gen >= 7); brw_set_default_access_mode(p, BRW_ALIGN_16); - /* The Haswell WaForceSIMD8ForBFIInstruction workaround says that we - * should - * - * "Force BFI instructions to be executed always in SIMD8." - * - * Otherwise we would be able to emit compressed instructions like we - * do for the other three-source instructions. - */ - if (dispatch_width == 16 && devinfo->is_haswell) { - brw_set_default_exec_size(p, BRW_EXECUTE_8); - brw_set_default_compression_control(p, BRW_COMPRESSION_NONE); - brw_BFI2(p, firsthalf(dst), firsthalf(src[0]), firsthalf(src[1]), firsthalf(src[2])); - brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF); - brw_BFI2(p, sechalf(dst), sechalf(src[0]), sechalf(src[1]), sechalf(src[2])); - brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED); - } else { - brw_BFI2(p, dst, src[0], src[1], src[2]); - } - brw_set_default_access_mode(p, BRW_ALIGN_1); + brw_BFI2(p, dst, src[0], src[1], src[2]); break; case BRW_OPCODE_IF: |