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| author | Francisco Jerez <currojerez@riseup.net> | 2015-07-28 11:25:59 +0300 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2015-07-29 13:27:12 +0300 |
| commit | d0a42b457fb905ce2cc12bb05110ef63656221c9 (patch) | |
| tree | b10ffa55d164fda19e13cc4164d0844c29319ac4 /src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp | |
| parent | 2294ba9565fbae49f1fc77ca171e9d6aafa34005 (diff) | |
| download | external_mesa3d-d0a42b457fb905ce2cc12bb05110ef63656221c9.zip external_mesa3d-d0a42b457fb905ce2cc12bb05110ef63656221c9.tar.gz external_mesa3d-d0a42b457fb905ce2cc12bb05110ef63656221c9.tar.bz2 | |
i965/fs: Detect multi-register MOVs correctly in register_coalesce.
register_coalesce() was considering the exec_size of the MOV
instruction alone to decide whether the register at offset+1 of the
source VGRF was being copied to inst->dst.reg_offset+1 of the
destination VGRF, which is only a valid assumption if the move has a
32-bit execution type. Use regs_read() instead to find out the number
of registers copied by the instruction.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp b/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp index a253c81..4f00b7f 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp @@ -195,7 +195,7 @@ fs_visitor::register_coalesce() continue; } reg_to_offset[offset] = inst->dst.reg_offset; - if (inst->exec_size == 16) + if (inst->regs_written > 1) reg_to_offset[offset + 1] = inst->dst.reg_offset + 1; mov[offset] = inst; channels_remaining -= inst->regs_written; |