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author | Matt Turner <mattst88@gmail.com> | 2015-05-11 09:29:56 -0700 |
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committer | Matt Turner <mattst88@gmail.com> | 2015-05-18 10:11:36 -0700 |
commit | 1e4e17fbd9296cc5064aabdb351a894d10190cb6 (patch) | |
tree | 6bf569a6938dc4330ad9d12d012394504c0e416f /src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | |
parent | ae405d429ff62e279cb4bb84d29581d4f7467b52 (diff) | |
download | external_mesa3d-1e4e17fbd9296cc5064aabdb351a894d10190cb6.zip external_mesa3d-1e4e17fbd9296cc5064aabdb351a894d10190cb6.tar.gz external_mesa3d-1e4e17fbd9296cc5064aabdb351a894d10190cb6.tar.bz2 |
i965/fs: Lower integer multiplication after optimizations.
32-bit x 32-bit integer multiplication requires multiple instructions
until Broadwell. This patch just lets us treat the MUL instruction in
the FS backend like it operates on Broadwell, and after optimizations
we lower it into a sequence of instructions on older platforms.
Doing this will allow us to some extra optimization on integer
multiplies.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_fs_visitor.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 31 |
1 files changed, 1 insertions, 30 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index abaea5f..ead7768 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -873,36 +873,7 @@ fs_visitor::visit(ir_expression *ir) unreachable("not reached: should be handled by ir_sub_to_add_neg"); case ir_binop_mul: - if (devinfo->gen < 8 && ir->type->is_integer()) { - /* For integer multiplication, the MUL uses the low 16 bits - * of one of the operands (src0 on gen6, src1 on gen7). The - * MACH accumulates in the contribution of the upper 16 bits - * of that operand. - */ - if (ir->operands[0]->is_uint16_constant()) { - if (devinfo->gen < 7) - emit(MUL(this->result, op[0], op[1])); - else - emit(MUL(this->result, op[1], op[0])); - } else if (ir->operands[1]->is_uint16_constant()) { - if (devinfo->gen < 7) - emit(MUL(this->result, op[1], op[0])); - else - emit(MUL(this->result, op[0], op[1])); - } else { - if (devinfo->gen >= 7) - no16("SIMD16 explicit accumulator operands unsupported\n"); - - struct brw_reg acc = retype(brw_acc_reg(dispatch_width), - this->result.type); - - emit(MUL(acc, op[0], op[1])); - emit(MACH(reg_null_d, op[0], op[1])); - emit(MOV(this->result, fs_reg(acc))); - } - } else { - emit(MUL(this->result, op[0], op[1])); - } + emit(MUL(this->result, op[0], op[1])); break; case ir_binop_imul_high: { if (devinfo->gen >= 7) |